[Intel-gfx] [PATCH 0/5] Tiger Lake: DKL phy PLLs

[Lucas De Marchi]

I'm dropping this series as Clint is working on this and may have a
different implementation.

Lucas De Marchi

On Thu, Jul 25, 2019 at 4:57 PM Lucas De Marchi
<lucas.demarchi at intel.com> wrote:
>
> Mostly the same patches as https://patchwork.freedesktop.org/series/63670/.
> Rebased.
>
> Lucas De Marchi (2):
>   drm/i915/tgl: re-indent code to prepare for DKL changes
>   drm/i915/tgl: start adding the DKL PLLs to use on TC ports
>
> Vandita Kulkarni (3):
>   drm/i915/tgl: Add DKL phy pll registers
>   drm/i915/tgl: Add DKL phy pll state calculations
>   drm/i915/tgl: Add support for dkl pll write
>
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 335 ++++++++++++++----
>  drivers/gpu/drm/i915/i915_reg.h               |  94 +++++
>  2 files changed, 368 insertions(+), 61 deletions(-)
>
> --
> 2.21.0
>
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-- 
Lucas De Marchi