[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Tiger Lake batch 3 (rev3)

Patchwork patchwork at emeril.freedesktop.org
Tue Aug 20 10:28:24 UTC 2019 

== Series Details ==

Series: Tiger Lake batch 3 (rev3)
URL   : https://patchwork.freedesktop.org/series/65290/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
58746e12b1f7 drm/i915/tgl: disable DDIC
372e74bfab57 drm/i915/tgl: add support for reading the timestamp frequency
90e823a21305 drm/i915/tgl: Move transcoders to pipes' powerwells
2fd9fa5d5cec drm/i915/tgl: update DMC firmware to 2.04
0c2d58357955 drm/i915/psr: Make PSR registers relative to transcoders
-:428: WARNING:LONG_LINE_COMMENT: line over 100 characters
#428: FILE: drivers/gpu/drm/i915/i915_reg.h:4246:
+#define EDP_PSR_AUX_DATA(tran, i)		_MMIO(_PSR_ADJ(tran, _SRD_AUX_DATA_A) + (i) + 4) /* 5 registers */

total: 0 errors, 1 warnings, 0 checks, 393 lines checked
a482a1e8ae44 drm/i915: Add transcoder restriction to PSR2
-:13: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#13: 
Since BDW PSR is allowed on any port, but we need to restrict by transcoder.

total: 0 errors, 1 warnings, 0 checks, 28 lines checked
e83d7ba515fe drm/i915: Do not unmask PSR interruption in IRQ postinstall
79c954dd51c4 drm/i915/psr: Only handle interruptions of the transcoder in use
-:230: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'trans' - possible side-effects?
#230: FILE: drivers/gpu/drm/i915/i915_reg.h:4227:
+#define   _EDP_PSR_TRANS_SHIFT(trans)		((trans) == TRANSCODER_EDP ? \
+						 0 : ((trans) + 1) * 8)

total: 0 errors, 0 warnings, 1 checks, 204 lines checked
ad641fc2c352 drm/i915/bdw+: Enable PSR in any eDP port
0d53855c280b drm/i915: Guard and warn if more than one eDP panel is present
a5907afdadb1 drm/i915: Do not read PSR2 register in transcoders without PSR2
ac21382ff41c drm/i915/tgl: PSR link standby is not supported anymore
e49b8d175f72 drm/i915/tgl: Access the right register when handling PSR interruptions
756855e5f16c drm/i915/tgl: Add maximum resolution supported by PSR2 HW
fdb7753af2b0 drm/i915: Fix DP-MST crtc_mask
036e3af1fd8b drm/i915: Add for_each_new_intel_connector_in_state()
-:22: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#22: FILE: drivers/gpu/drm/i915/display/intel_display.h:414:
+#define for_each_new_intel_connector_in_state(__state, connector, new_connector_state, __i) \
+	for ((__i) = 0; \
+	     (__i) < (__state)->base.num_connector; \
+	     (__i)++) \
+		for_each_if ((__state)->base.connectors[__i].ptr && \
+			     ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \
+			     (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))

-:22: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects?
#22: FILE: drivers/gpu/drm/i915/display/intel_display.h:414:
+#define for_each_new_intel_connector_in_state(__state, connector, new_connector_state, __i) \
+	for ((__i) = 0; \
+	     (__i) < (__state)->base.num_connector; \
+	     (__i)++) \
+		for_each_if ((__state)->base.connectors[__i].ptr && \
+			     ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \
+			     (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))

-:22: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#22: FILE: drivers/gpu/drm/i915/display/intel_display.h:414:
+#define for_each_new_intel_connector_in_state(__state, connector, new_connector_state, __i) \
+	for ((__i) = 0; \
+	     (__i) < (__state)->base.num_connector; \
+	     (__i)++) \
+		for_each_if ((__state)->base.connectors[__i].ptr && \
+			     ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \
+			     (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))

-:26: WARNING:SPACING: space prohibited between function name and open parenthesis '('
#26: FILE: drivers/gpu/drm/i915/display/intel_display.h:418:
+		for_each_if ((__state)->base.connectors[__i].ptr && \

-:27: WARNING:LONG_LINE: line over 100 characters
#27: FILE: drivers/gpu/drm/i915/display/intel_display.h:419:
+			     ((connector) = to_intel_connector((__state)->base.connectors[__i].ptr), \

-:28: WARNING:LONG_LINE: line over 100 characters
#28: FILE: drivers/gpu/drm/i915/display/intel_display.h:420:
+			     (new_connector_state) = to_intel_digital_connector_state((__state)->base.connectors[__i].new_state), 1))

total: 1 errors, 3 warnings, 2 checks, 14 lines checked
3f922838d833 drm: Add for_each_oldnew_intel_crtc_in_state_reverse()
-:27: WARNING:LONG_LINE: line over 100 characters
#27: FILE: drivers/gpu/drm/i915/display/intel_display.h:422:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \

-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects?
#27: FILE: drivers/gpu/drm/i915/display/intel_display.h:422:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \
+	for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \
+	     (__i) >= 0  && \
+	     ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
+	      (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \
+	      (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
+	     (__i)--) \
+		for_each_if(crtc)

-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'crtc' - possible side-effects?
#27: FILE: drivers/gpu/drm/i915/display/intel_display.h:422:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \
+	for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \
+	     (__i) >= 0  && \
+	     ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
+	      (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \
+	      (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
+	     (__i)--) \
+		for_each_if(crtc)

-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#27: FILE: drivers/gpu/drm/i915/display/intel_display.h:422:
+#define for_each_oldnew_intel_crtc_in_state_reverse(__state, crtc, old_crtc_state, new_crtc_state, __i) \
+	for ((__i) = (__state)->base.dev->mode_config.num_crtc - 1; \
+	     (__i) >= 0  && \
+	     ((crtc) = to_intel_crtc((__state)->base.crtcs[__i].ptr), \
+	      (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \
+	      (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
+	     (__i)--) \
+		for_each_if(crtc)

total: 0 errors, 1 warnings, 3 checks, 15 lines checked
28da8c6b55a1 drm/i915: Disable pipes in reverse order
d0c351ed7a64 drm/i915/tgl: Select master transcoder in DP MST
4a2cd76e1627 drm/i915/tgl: Introduce initial Tiger Lake workarounds
c40e6a531810 drm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating
f16ba900d801 drm/i915/tgl: Do not apply WaIncreaseDefaultTLBEntries from GEN12 onwards
ffdeb0dcaa0a drm/i915/tgl: Register state context definition for Gen12
ad6242cf46e5 drm/i915/tgl: move DP_TP_* to transcoder
4801fd3cc23d drm/i915/tgl: Implement TGL DisplayPort training sequence
157dcdad88bf HACK: drm/i915/tgl: Gen12 render context size
b603870d172b drm/i915/tgl: add Gen12 default indirect ctx offset
2ad1cec17264 drm/i915/tgl: add GEN12_MAX_CONTEXT_HW_ID
124dd207b9ab drm/i915/tgl: Gen12 csb support
4c6975da6450 drm/i915/tgl: Report valid VDBoxes with SFC capability
68fd99478049 rm/i915/tgl: Move GTCR register to cope with GAM MMIO address remap
cab6cadef710 drm/i915/tgl: Updated Private PAT programming
62f4069651df drm/i915/tgl/perf: use the same oa ctx_id format as icl
7ce3c63b50e3 drm/i915/perf: add a parameter to control the size of OA buffer
3a5d5f60fea3 drm/i915/tgl: Add perf support on TGL
-:546: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#546: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 610 lines checked
b7fb4c859fbc drm/i915/tgl: Gen-12 display loses Yf tiling and legacy CCS support
30eb80577dd3 drm/framebuffer/tgl: Format modifier for Intel Gen-12 render compression
3f7059412dc4 drm/i915/tgl: Gen-12 render decompression
6866398ba290 drm/framebuffer/tgl: Format modifier for Intel Gen-12 media compression
98e274265c6d drm/i915/tgl: Gen-12 media compression
-:74: WARNING:MISSING_BREAK: Possible switch case/default not preceded by break or fallthrough comment
#74: FILE: drivers/gpu/drm/i915/display/intel_display.c:2523:
+	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:

total: 0 errors, 1 warnings, 0 checks, 134 lines checked

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