[Intel-gfx] [PATCH 1/5] drm/i915/dp: stylistic cleanup around hdcp2_msg_data

[Jani Nikula]

On Tue, 20 Aug 2019, Ville Syrjälä <ville.syrjala at linux.intel.com> wrote:
> On Tue, Aug 20, 2019 at 04:40:15PM +0300, Jani Nikula wrote:
>> Split struct declaration and array definition. Fix indents and
>> whitespace. No functional changes.
>> 
>> Cc: Ramalingam C <ramalingam.c at intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula at intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp.c | 70 +++++++++++++------------
>>  1 file changed, 36 insertions(+), 34 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 5c45a3bb102d..001d520660a9 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -5812,47 +5812,49 @@ struct hdcp2_dp_errata_stream_type {
>>  	u8	stream_type;
>>  } __packed;
>>  
>> -static struct hdcp2_dp_msg_data {
>> +struct hdcp2_dp_msg_data {
>>  	u8 msg_id;
>>  	u32 offset;
>>  	bool msg_detectable;
>>  	u32 timeout;
>>  	u32 timeout2; /* Added for non_paired situation */
>
> Looks a bit poorly packed. Also u32 seems overkill for the timeouts.

Yeah, well, one cleanup at a time, okay? :)

BR,
Jani.


>
>> -	} hdcp2_msg_data[] = {
>> -		{HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0},
>> -		{HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
>> -				false, HDCP_2_2_CERT_TIMEOUT_MS, 0},
>> -		{HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
>> -				false, 0, 0},
>> -		{HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
>> -				false, 0, 0},
>> -		{HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
>> -				true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
>> -				HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS},
>> -		{HDCP_2_2_AKE_SEND_PAIRING_INFO,
>> -				DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
>> -				HDCP_2_2_PAIRING_TIMEOUT_MS, 0},
>> -		{HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0},
>> -		{HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
>> -				false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0},
>> -		{HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
>> -				0, 0},
>> -		{HDCP_2_2_REP_SEND_RECVID_LIST,
>> -				DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
>> -				HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0},
>> -		{HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
>> -				0, 0},
>> -		{HDCP_2_2_REP_STREAM_MANAGE,
>> -				DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
>> -				0, 0},
>> -		{HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
>> -				false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0},
>> +};
>> +
>> +static struct hdcp2_dp_msg_data hdcp2_msg_data[] = {
>> +	{ HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0 },
>> +	{ HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
>> +	  false, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
>> +	{ HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
>> +	  false, 0, 0 },
>> +	{ HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
>> +	  false, 0, 0 },
>> +	{ HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
>> +	  true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
>> +	  HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS },
>> +	{ HDCP_2_2_AKE_SEND_PAIRING_INFO,
>> +	  DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
>> +	  HDCP_2_2_PAIRING_TIMEOUT_MS, 0 },
>> +	{ HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0 },
>> +	{ HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
>> +	  false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0 },
>> +	{ HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
>> +	  0, 0 },
>> +	{ HDCP_2_2_REP_SEND_RECVID_LIST,
>> +	  DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
>> +	  HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0 },
>> +	{ HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
>> +	  0, 0 },
>> +	{ HDCP_2_2_REP_STREAM_MANAGE,
>> +	  DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
>> +	  0, 0 },
>> +	{ HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
>> +	  false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0 },
>>  /* local define to shovel this through the write_2_2 interface */
>>  #define HDCP_2_2_ERRATA_DP_STREAM_TYPE	50
>> -		{HDCP_2_2_ERRATA_DP_STREAM_TYPE,
>> -				DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
>> -				0, 0},
>> -		};
>> +	{ HDCP_2_2_ERRATA_DP_STREAM_TYPE,
>> +	  DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
>> +	  0, 0 },
>> +};
>>  
>>  static inline
>>  int intel_dp_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
>> -- 
>> 2.20.1
>> 
>> _______________________________________________
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>> Intel-gfx at lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Graphics Center