[Intel-gfx] [PATCH v2 22/40] drm/i915/tgl: Do not apply WaIncreaseDefaultTLBEntries from GEN12 onwards

[Summers, Stuart]

On Sat, 2019-08-17 at 02:38 -0700, Lucas De Marchi wrote:
> From: Michel Thierry <michel.thierry at intel.com>
> 
> Workaround no longer needed (plus L3_LRA_1_GPGPU doesn't exist).

Took a look at this one today and I can at least say this register is
not present at the previous location. I didn't have any luck finding a
specific reference saying this was dropped for TGL.

I'll dig a bit deeper for a full review tomorrow if this is still
waiting for feedback.

Thanks,
Stuart

> 
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Signed-off-by: Michel Thierry <michel.thierry at intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 5413c2ff51a2..6f6f0687d0bb 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2012,7 +2012,7 @@ static void gtt_write_workarounds(struct
> intel_gt *gt)
>  		intel_uncore_write(uncore,
>  				   GEN8_L3_LRA_1_GPGPU,
>  				   GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BX
> T);
> -	else if (INTEL_GEN(i915) >= 9)
> +	else if (INTEL_GEN(i915) >= 9 && INTEL_GEN(i915) <= 11)
>  		intel_uncore_write(uncore,
>  				   GEN8_L3_LRA_1_GPGPU,
>  				   GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SK
> L);
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