[Intel-gfx] [PATCH] drm/i915: disable set/get_tiling ioctl on gen12+

[Daniel Vetter]

On Wed, Aug 21, 2019 at 3:55 PM Ville Syrjälä
<ville.syrjala at linux.intel.com> wrote:
>
> On Tue, Aug 20, 2019 at 01:57:44PM -0700, Daniele Ceraolo Spurio wrote:
> >
> >
> > On 8/20/19 12:54 PM, Daniel Vetter wrote:
> > > The cpu (de)tiler hw is gone, this stopped being useful. Plus it never
> > > supported any of the fancy new tiling formats, which means userspace
> > > also stopped using the magic side-channel this provides.
> > >
> > > This would totally break a lot of the igts, but they're already broken
> > > for the same reasons as userspace on gen12 would be.
> > >
> > > v2: Look at ggtt->num_fences instead, that also avoids the need for a
> > > comment (Chris). This also means that gen12 support really needs to
> > > make sure num_fences is set to 0. There is a patch for that, but it
> > > checks for HAS_MAPPABLE_APERTURE, which I'm not sure is the right
> > > thing really. Adding relevant people.
> > >
> >
> > We'd obviously need to make that setting for all gen12+, because TGL
> > does have mappable aperture.
> >
> > Apart from the tiling ioctl, the only place I see where we set tiling is
> > intel_alloc_initial_plane_obj(), can the users of that object handle the
> > lack of fences gracefully?
>
> Gen4+ display engine has its own tiling controls and doesn't care about
> fences. So we should be able to leave the obj tiling set to NONE.
>
> Hmm. Actually I think we should reject tiled framebuffers in the BIOS
> fb takeover because fbdev needs a linear view for the memory. No can
> do without the fence.

Yeah I think this is just more fallout from "no more fences in the hw".
-Daniel

>
> > When I wrote the num_fences=0 patch I was
> > expecting display to be unavailable, so I didn't really look at that
> > part of the code.
> >
> > It'd also be nice to be more explicit with fencing since we seem to
> > often call i915_vma_pin_iomap, which implicitly applies a fence if
> > needed, on objects that can't be tiled or have had a fence assigned a
> > few lines before. This is more a nice to have tough, possibly together
> > with a split of the "mappable" and "fenceable" attributes of the vma.
> >
> > Daniele
> >
> > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> > > Cc: Stuart Summers <stuart.summers at intel.com>
> > > Cc: Matthew Auld <matthew.auld at intel.com>
> > > Cc: Kenneth Graunke <kenneth at whitecape.org>
> > > Cc: Jason Ekstrand <jason at jlekstrand.net>
> > > Cc: Chris Wilson <chris at chris-wilson.co.uk>
> > > Cc: Lucas De Marchi <lucas.demarchi at intel.com>
> > > Signed-off-by: Daniel Vetter <daniel.vetter at intel.com>
> > > ---
> > >   drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 7 +++++++
> > >   1 file changed, 7 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
> > > index ca0c2f451742..e5d1ae8d4dba 100644
> > > --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
> > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c
> > > @@ -313,10 +313,14 @@ int
> > >   i915_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
> > >                       struct drm_file *file)
> > >   {
> > > +   struct drm_i915_private *dev_priv = to_i915(dev);
> > >     struct drm_i915_gem_set_tiling *args = data;
> > >     struct drm_i915_gem_object *obj;
> > >     int err;
> > >
> > > +   if (!dev_priv->ggtt.num_fences)
> > > +           return -EOPNOTSUPP;
> > > +
> > >     obj = i915_gem_object_lookup(file, args->handle);
> > >     if (!obj)
> > >             return -ENOENT;
> > > @@ -402,6 +406,9 @@ i915_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
> > >     struct drm_i915_gem_object *obj;
> > >     int err = -ENOENT;
> > >
> > > +   if (!dev_priv->ggtt.num_fences)
> > > +           return -EOPNOTSUPP;
> > > +
> > >     rcu_read_lock();
> > >     obj = i915_gem_object_lookup_rcu(file, args->handle);
> > >     if (obj) {
> > >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel



-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch