[Intel-gfx] [PATCH v3 18/23] drm/i915/tgl/perf: use the same oa ctx_id format as icl

[Umesh Nerlige Ramappa]

Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa at intel.com>

On Fri, Aug 23, 2019 at 01:20:50AM -0700, Lucas De Marchi wrote:
>From: Michel Thierry <michel.thierry at intel.com>
>
>Compared to Icelake, Tigerlake's MAX_CONTEXT_HW_ID is smaller by one, but
>since we just use the upper 32 bits of the lrc_desc, it's guaranteed OA
>will use the correct one.
>
>Cc: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
>Signed-off-by: Michel Thierry <michel.thierry at intel.com>
>Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
>---
> drivers/gpu/drm/i915/i915_perf.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
>index e42b86827d6b..2c9f46e12622 100644
>--- a/drivers/gpu/drm/i915/i915_perf.c
>+++ b/drivers/gpu/drm/i915/i915_perf.c
>@@ -1299,7 +1299,8 @@ static int oa_get_render_ctx_id(struct i915_perf_stream *stream)
> 		}
> 		break;
>
>-	case 11: {
>+	case 11:
>+	case 12: {
> 		stream->specific_ctx_id_mask =
> 			((1U << GEN11_SW_CTX_ID_WIDTH) - 1) << (GEN11_SW_CTX_ID_SHIFT - 32) |
> 			((1U << GEN11_ENGINE_INSTANCE_WIDTH) - 1) << (GEN11_ENGINE_INSTANCE_SHIFT - 32) |
>-- 
>2.23.0
>
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