[Intel-gfx] [PATCH 04/28] drm/i915/gtt: Downgrade Baytrail back to aliasing-ppgtt

[Chris Wilson]

With the upcoming change in timing (dramatically reducing the latency
between manipulating the ppGTT and execution), no amount of tweaking
could save Baytrail, it would always fail to invalidate its TLB. Ville
was right, Baytrail is beyond hope.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 23 +++-------------------
 drivers/gpu/drm/i915/i915_pci.c            |  2 +-
 2 files changed, 4 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
index 601c16239fdf..fdddda75eb41 100644
--- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
@@ -1751,26 +1751,10 @@ static int switch_context(struct i915_request *rq)
 
 	if (vm) {
 		struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
-		int loops;
 
-		/*
-		 * Baytail takes a little more convincing that it really needs
-		 * to reload the PD between contexts. It is not just a little
-		 * longer, as adding more stalls after the load_pd_dir (i.e.
-		 * adding a long loop around flush_pd_dir) is not as effective
-		 * as reloading the PD umpteen times. 32 is derived from
-		 * experimentation (gem_exec_parallel/fds) and has no good
-		 * explanation.
-		 */
-		loops = 1;
-		if (engine->id == BCS0 && IS_VALLEYVIEW(engine->i915))
-			loops = 32;
-
-		do {
-			ret = load_pd_dir(rq, ppgtt);
-			if (ret)
-				goto err;
-		} while (--loops);
+		ret = load_pd_dir(rq, ppgtt);
+		if (ret)
+			return ret;
 
 		if (ppgtt->pd_dirty_engines & engine->mask) {
 			unwind_mm = engine->mask;
@@ -1832,7 +1816,6 @@ static int switch_context(struct i915_request *rq)
 err_mm:
 	if (unwind_mm)
 		i915_vm_to_ppgtt(vm)->pd_dirty_engines |= unwind_mm;
-err:
 	return ret;
 }
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 1974e4c78a43..4c120a2e92af 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -476,7 +476,7 @@ static const struct intel_device_info intel_valleyview_info = {
 	.has_rps = true,
 	.display.has_gmch = 1,
 	.display.has_hotplug = 1,
-	.ppgtt_type = INTEL_PPGTT_FULL,
+	.ppgtt_type = INTEL_PPGTT_ALIASING,
 	.ppgtt_size = 31,
 	.has_snoop = true,
 	.has_coherent_ggtt = false,
-- 
2.23.0