[Intel-gfx] [v9][PATCH 05/11] drm/i915/display: Extract i9xx_read_luts()
Jani Nikula
jani.nikula at intel.com
Fri Aug 30 12:54:58 UTC 2019
On Fri, 30 Aug 2019, Swati Sharma <swati2.sharma at intel.com> wrote:
> For the legacy(gen < 4) gamma, add hw read out to create hw blob of gamma
> lut values. Also, add function intel_color_lut_pack to convert hw value
> with given bit precision to lut property val.
>
> v4: -No need to initialize *blob [Jani]
> -Removed right shifts [Jani]
> -Dropped dev local var [Jani]
> v5: -Returned blob instead of assigning it internally within the
> function [Ville]
> -Renamed function i9xx_get_color_config() to i9xx_read_luts()
> -Renamed i9xx_get_config_internal() to i9xx_read_lut_8() [Ville]
> v9: -Change in commit message [Jani, Uma]
> -Wrap commit within 75 characters [Uma]
> -Use macro for 256 [Uma]
> -Made read func para as const [Ville, Uma]
>
> Signed-off-by: Swati Sharma <swati2.sharma at intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 54 ++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 3 ++
> 2 files changed, 57 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
> index 141efb0..107a03a 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -1574,6 +1574,59 @@ bool intel_color_lut_equal(struct drm_property_blob *blob1,
> return true;
> }
>
> +/* convert hw value with given bit_precision to lut property val */
> +static u32 intel_color_lut_pack(u32 val, u32 bit_precision)
> +{
> + u32 max = 0xffff >> (16 - bit_precision);
> +
> + val = clamp_val(val, 0, max);
> +
> + if (bit_precision < 16)
> + val <<= 16 - bit_precision;
> +
> + return val;
> +}
> +
> +static struct drm_property_blob *
> +i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
> +{
> + struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
> + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> + enum pipe pipe = crtc->pipe;
> + struct drm_property_blob *blob;
> + struct drm_color_lut *blob_data;
> + u32 i, val;
> +
> + blob = drm_property_create_blob(&dev_priv->drm,
> + sizeof(struct drm_color_lut) * LEGACY_LUT_LENGTH,
> + NULL);
> + if (IS_ERR(blob))
> + return NULL;
> +
> + blob_data = blob->data;
> +
> + for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
> + if (HAS_GMCH(dev_priv))
> + val = I915_READ(PALETTE(pipe, i));
> + else
> + val = I915_READ(LGC_PALETTE(pipe, i));
> +
> + blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
> + LGC_PALETTE_RED_MASK, val), 8);
> + blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
> + LGC_PALETTE_GREEN_MASK, val), 8);
> + blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
> + LGC_PALETTE_BLUE_MASK, val), 8);
> + }
> +
> + return blob;
> +}
> +
> +void i9xx_read_luts(struct intel_crtc_state *crtc_state)
Should be static, as warned by sparse.
Reviewed-by: Jani Nikula <jani.nikula at intel.com>
> +{
> + crtc_state->base.gamma_lut = i9xx_read_lut_8(crtc_state);
> +}
> +
> void intel_color_init(struct intel_crtc *crtc)
> {
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> @@ -1594,6 +1647,7 @@ void intel_color_init(struct intel_crtc *crtc)
> dev_priv->display.color_check = i9xx_color_check;
> dev_priv->display.color_commit = i9xx_color_commit;
> dev_priv->display.load_luts = i9xx_load_luts;
> + dev_priv->display.read_luts = i9xx_read_luts;
> }
> } else {
> if (INTEL_GEN(dev_priv) >= 11)
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 02e1ef1..09ea5b1 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -7192,6 +7192,9 @@ enum {
> /* legacy palette */
> #define _LGC_PALETTE_A 0x4a000
> #define _LGC_PALETTE_B 0x4a800
> +#define LGC_PALETTE_RED_MASK REG_GENMASK(23, 16)
> +#define LGC_PALETTE_GREEN_MASK REG_GENMASK(15, 8)
> +#define LGC_PALETTE_BLUE_MASK REG_GENMASK(7, 0)
> #define LGC_PALETTE(pipe, i) _MMIO(_PIPE(pipe, _LGC_PALETTE_A, _LGC_PALETTE_B) + (i) * 4)
>
> /* ilk/snb precision palette */
--
Jani Nikula, Intel Open Source Graphics Center
More information about the Intel-gfx
mailing list