[Intel-gfx] [PATCH] drm/i915: Manually flush barriers on eviction

Chris Wilson chris at chris-wilson.co.uk
Sun Dec 1 10:41:51 UTC 2019


As the caller may be keeping the engines awake, even though
wait-for-idle will flush the contexts, the contexts will not be unpinned
until the engine is parked. Manually flush the idle barriers to ensure
that any context that can be unpinned, will be.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_gem_evict.c | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c b/drivers/gpu/drm/i915/i915_gem_evict.c
index 7e62c310290f..0ff4be9b2954 100644
--- a/drivers/gpu/drm/i915/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
@@ -28,7 +28,7 @@
 
 #include <drm/i915_drm.h>
 
-#include "gem/i915_gem_context.h"
+#include "gt/intel_engine_heartbeat.h"
 #include "gt/intel_gt_requests.h"
 
 #include "i915_drv.h"
@@ -40,6 +40,10 @@ I915_SELFTEST_DECLARE(static struct igt_evict_ctl {
 
 static int ggtt_flush(struct intel_gt *gt)
 {
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	int ret;
+
 	/*
 	 * Not everything in the GGTT is tracked via vma (otherwise we
 	 * could evict as required with minimal stalling) so we are forced
@@ -47,6 +51,21 @@ static int ggtt_flush(struct intel_gt *gt)
 	 * the hopes that we can then remove contexts and the like only
 	 * bound by their active reference.
 	 */
+	ret = intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
+	if (ret)
+		return ret;
+
+	/*
+	 * The engines may be kept awake by the caller and so skip the expected
+	 * barrier flushes (needed for unpinning contexts) upon parking.
+	 */
+	for_each_engine(engine, gt, id) {
+		ret = intel_engine_flush_barriers(engine);
+		if (ret)
+			return ret;
+	}
+
+	/* And once more for the barriers */
 	return intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
 }
 
-- 
2.24.0



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