[Intel-gfx] [RFC 06/13] drm/i915/svm: Page table mirroring support
Niranjan Vishwanathapura
niranjana.vishwanathapura at intel.com
Tue Dec 3 19:07:25 UTC 2019
On Tue, Nov 26, 2019 at 06:45:14PM +0000, Jason Gunthorpe wrote:
>On Mon, Nov 25, 2019 at 08:32:58AM -0800, Niranjan Vishwanathapura wrote:
>> > And putting the cpu PFN of a ZONE_DEVICE device page into
>> > sg_dma_address still looks very wrong to me
>>
>> The below call in patch 7 does convert any cpu PFN to device address.
>> So, it won't be CPU PFN.
>> i915_dmem_convert_pfn(vm->i915, &range);
>
>Well, then it should be done here in patch 6, surely?
>
>> Also, only reason to use sgl list is because i915 driver page table update
>> functions takes an sgl, otherwise we can directly deal with range.pfns array.
>
>Maybe that should be fixed instead of abusing sgl
>
Sorry, missed these comments.
Well, this i915 SVM support can be extended to work on intel integrated gfx also
with host memory (no ZONE_DEVICE), though enabling it is not the primary focus for
this patch series.
There we need to dma map these CPU PFNs and assign to the sg_dma_address.
Device memory plugin for discreate graphics is added in patch 7 of this series,
hence this convert_pfn function is added there.
Niranjana
>Jason
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