[Intel-gfx] [PATCH 1/5] drm/i915/gem: Flush the pwrite through the chipset before signaling

[Tvrtko Ursulin]

On 06/12/2019 10:55, Chris Wilson wrote:
> Before we signal the fence to indicate completion, ensure the pwrite
> through the indirect GGTT is coherent (as best as we know) in memory.
> Any listeners to the fence may start immediately and sample from the
> backing store prior to the writes being posted, thus seeing stale data.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
>   drivers/gpu/drm/i915/i915_gem.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 98b65b718e1a..919d3a723c50 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -670,11 +670,12 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
>   		user_data += page_length;
>   		offset += page_length;
>   	}
> +
> +	intel_gt_flush_ggtt_writes(ggtt->vm.gt);
>   	intel_frontbuffer_flush(obj->frontbuffer, ORIGIN_CPU);
>   
>   	i915_gem_object_unlock_fence(obj, fence);
>   out_unpin:
> -	intel_gt_flush_ggtt_writes(ggtt->vm.gt);
>   	if (drm_mm_node_allocated(&node)) {
>   		ggtt->vm.clear_range(&ggtt->vm, node.start, node.size);
>   		remove_mappable_node(ggtt, &node);
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Regards,

Tvrtko