[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: enable DSC (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915/dsi: enable DSC (rev6)
URL   : https://patchwork.freedesktop.org/series/69540/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
a23b05a241fc drm/i915/bios: pass devdata to parse_ddi_port
a0590902b587 drm/i915/bios: parse compression parameters block
-:107: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "devdata->dsc"
#107: FILE: drivers/gpu/drm/i915/display/intel_bios.c:1657:
+		      devdata->dsc != NULL);

total: 0 errors, 0 warnings, 1 checks, 101 lines checked
5e0e7428b343 drm/i915/bios: add support for querying DSC details for encoder
6f03be6f86c6 drm/i915/dsc: move DP specific compute params to intel_dp.c
2609e4e50bf2 drm/i915/dsc: move slice height calculation to encoder
2cfb9e182fb0 drm/i915/dsc: add support for computing and writing PPS for DSI encoders
9d4ed96330e0 drm/i915/dsc: add basic hardware state readout support
b0563267830c drm/i915/dsi: set pipe_bpp on ICL configure config
26caeb29b90e drm/i915/dsi: abstract afe_clk calculation
4395ce411630 drm/i915/dsi: use afe_clk() instead of intel_dsi_bitrate()
770a03614ae1 drm/i915/dsi: take compression into account in afe_clk()
3665acb6aef6 drm/i915/dsi: use compressed pixel format with DSC
a7b9e220bef4 drm/i915/dsi: account for DSC in horizontal timings
ee911caff1df drm/i915/dsi: Fix state mismatch warns for horizontal timings with DSC
c1d68732ce8a drm/i915/dsi: add support for DSC