[Intel-gfx] [PATCH 03/15] drm/i915: Move CCS stride alignment W/A inside intel_fb_stride_alignment
Matt Roper
matthew.d.roper at intel.com
Thu Dec 19 21:04:14 UTC 2019
On Wed, Dec 18, 2019 at 06:10:53PM +0200, Imre Deak wrote:
> From: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
>
> Easier to read if all the alignment changes are in one place and contained
> within a function.
>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
> Signed-off-by: Imre Deak <imre.deak at intel.com>
Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 31 ++++++++++----------
> 1 file changed, 16 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 928a581336a7..9c27cf651e08 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -2589,7 +2589,22 @@ intel_fb_stride_alignment(const struct drm_framebuffer *fb, int color_plane)
> else
> return 64;
> } else {
> - return intel_tile_width_bytes(fb, color_plane);
> + u32 tile_width = intel_tile_width_bytes(fb, color_plane);
> +
> + /*
> + * Display WA #0531: skl,bxt,kbl,glk
> + *
> + * Render decompression and plane width > 3840
> + * combined with horizontal panning requires the
> + * plane stride to be a multiple of 4. We'll just
> + * require the entire fb to accommodate that to avoid
> + * potential runtime errors at plane configuration time.
> + */
> + if (IS_GEN(dev_priv, 9) && is_ccs_modifier(fb->modifier) &&
> + color_plane == 0 && fb->width > 3840)
> + tile_width *= 4;
> +
> + return tile_width;
> }
> }
>
> @@ -16341,20 +16356,6 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
> }
>
> stride_alignment = intel_fb_stride_alignment(fb, i);
> -
> - /*
> - * Display WA #0531: skl,bxt,kbl,glk
> - *
> - * Render decompression and plane width > 3840
> - * combined with horizontal panning requires the
> - * plane stride to be a multiple of 4. We'll just
> - * require the entire fb to accommodate that to avoid
> - * potential runtime errors at plane configuration time.
> - */
> - if (IS_GEN(dev_priv, 9) && i == 0 && fb->width > 3840 &&
> - is_ccs_modifier(fb->modifier))
> - stride_alignment *= 4;
> -
> if (fb->pitches[i] & (stride_alignment - 1)) {
> DRM_DEBUG_KMS("plane %d pitch (%d) must be at least %u byte aligned\n",
> i, fb->pitches[i], stride_alignment);
> --
> 2.22.0
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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