[Intel-gfx] [PATCH v3 05/10] drm/i915: prefer 3-letter acronym for cannonlake

[Matt Roper]

On Mon, Dec 23, 2019 at 09:32:39AM -0800, Lucas De Marchi wrote:
> We are currently using a mix of platform name and acronym to name the
> functions. Let's prefer the acronym as it should be clear what platform
> it's about and it's shorter, so it doesn't go over 80 columns in a few
> cases. This converts cannonlake to cnl where appropriate.

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> Acked-by: Jani Nikula <jani.nikula at linux.intel.com>
> Acked-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 18ac15df91c7..98d6bcb4c761 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -10440,9 +10440,8 @@ static int hsw_crtc_compute_clock(struct intel_crtc *crtc,
>  	return 0;
>  }
>  
> -static void cannonlake_get_ddi_pll(struct drm_i915_private *dev_priv,
> -				   enum port port,
> -				   struct intel_crtc_state *pipe_config)
> +static void cnl_get_ddi_pll(struct drm_i915_private *dev_priv, enum port port,
> +			    struct intel_crtc_state *pipe_config)
>  {
>  	enum intel_dpll_id id;
>  	u32 temp;
> @@ -10744,7 +10743,7 @@ static void hsw_get_ddi_port_state(struct intel_crtc *crtc,
>  	if (INTEL_GEN(dev_priv) >= 11)
>  		icelake_get_ddi_pll(dev_priv, port, pipe_config);
>  	else if (IS_CANNONLAKE(dev_priv))
> -		cannonlake_get_ddi_pll(dev_priv, port, pipe_config);
> +		cnl_get_ddi_pll(dev_priv, port, pipe_config);
>  	else if (IS_GEN9_BC(dev_priv))
>  		skl_get_ddi_pll(dev_priv, port, pipe_config);
>  	else if (IS_GEN9_LP(dev_priv))
> -- 
> 2.24.0
> 
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-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795