[Intel-gfx] [PATCH 2/3] drm/i915: Add Wa_1408615072 and Wa_1407596294 to icl, ehl

Lucas De Marchi lucas.demarchi at intel.com
Tue Dec 24 17:05:44 UTC 2019


On Mon, Dec 23, 2019 at 05:20:25PM -0800, Matt Roper wrote:
>Workaround database indicates we should disable clock gating of both the
>vsunit and hsunit.
>
>Bspec: 33450
>Bspec: 33451
>Cc: Lucas De Marchi <lucas.demarchi at intel.com>
>Cc: Matt Atwood <matthew.s.atwood at intel.com>
>Cc: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
>---
> drivers/gpu/drm/i915/i915_reg.h | 4 +++-
> drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
> 2 files changed, 11 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index bbfedeb00b7f..968a43f7cd98 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -4177,7 +4177,9 @@ enum {
> #define  CPSSUNIT_CLKGATE_DIS		REG_BIT(9)
>
> #define UNSLICE_UNIT_LEVEL_CLKGATE	_MMIO(0x9434)
>-#define  VFUNIT_CLKGATE_DIS		(1 << 20)
>+#define   VFUNIT_CLKGATE_DIS		REG_BIT(20)
>+#define   HSUNIT_CLKGATE_DIS		REG_BIT(8)
>+#define   VSUNIT_CLKGATE_DIS		REG_BIT(3)
>
> #define INF_UNIT_LEVEL_CLKGATE		_MMIO(0x9560)
> #define   CGPSF_CLKGATE_DIS		(1 << 3)
>diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>index 31ec82337e4f..58ba6cbf9a57 100644
>--- a/drivers/gpu/drm/i915/intel_pm.c
>+++ b/drivers/gpu/drm/i915/intel_pm.c
>@@ -6590,6 +6590,14 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
> 	/* WaEnable32PlaneMode:icl */
> 	I915_WRITE(GEN9_CSFE_CHICKEN1_RCS,
> 		   _MASKED_BIT_ENABLE(GEN11_ENABLE_32_PLANE_MODE));
>+
>+	/*
>+	 * Wa_1408615072:icl,ehl  (vsunit)
>+	 * Wa_1407596294:icl,ehl  (hsunit)
>+	 */
>+	intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE,
>+			 0, VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);

It's not very clear to me if we should leave it always ungated, but it
seems to follow the other similar WAs.


Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi

>+
> }
>
> static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
>-- 
>2.23.0
>


More information about the Intel-gfx mailing list