[Intel-gfx] [PATCH 3/3] drm/i915/tgl: Extend Wa_1408615072 to tgl

[Lucas De Marchi]

On Mon, Dec 23, 2019 at 05:20:26PM -0800, Matt Roper wrote:
>Although the workaround number and description are the same, the vsunit
>clock gate disable bit has moved to a new register and location on
>gen12.
>
>Bspec: 52890
>Bspec: 52758
>Cc: Lucas De Marchi <lucas.demarchi at intel.com>
>Cc: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>

Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi

>---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> 2 files changed, 7 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index 968a43f7cd98..030a3f3e69af 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -4181,6 +4181,9 @@ enum {
> #define   HSUNIT_CLKGATE_DIS		REG_BIT(8)
> #define   VSUNIT_CLKGATE_DIS		REG_BIT(3)
>
>+#define UNSLICE_UNIT_LEVEL_CLKGATE2	_MMIO(0x94e4)
>+#define   VSUNIT_CLKGATE_DIS_TGL	REG_BIT(19)
>+
> #define INF_UNIT_LEVEL_CLKGATE		_MMIO(0x9560)
> #define   CGPSF_CLKGATE_DIS		(1 << 3)
>
>diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>index 58ba6cbf9a57..fe02ac3a3674 100644
>--- a/drivers/gpu/drm/i915/intel_pm.c
>+++ b/drivers/gpu/drm/i915/intel_pm.c
>@@ -6605,6 +6605,10 @@ static void tgl_init_clock_gating(struct drm_i915_private *dev_priv)
> 	u32 vd_pg_enable = 0;
> 	unsigned int i;
>
>+	/* Wa_1408615072:tgl */
>+	intel_uncore_rmw(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE2,
>+			 0, VSUNIT_CLKGATE_DIS_TGL);
>+
> 	/* This is not a WA. Enable VD HCP & MFX_ENC powergate */
> 	for (i = 0; i < I915_MAX_VCS; i++) {
> 		if (HAS_ENGINE(dev_priv, _VCS(i)))
>-- 
>2.23.0
>