[Intel-gfx] [PATCH 4/5] drm/i915/gt: Restore coarse power gating for gen9

Chris Wilson chris at chris-wilson.co.uk
Thu Dec 26 00:57:00 UTC 2019


Believe in the power of the sacrificial kernel context and restore
coarse power gating in the belief that the issue affects only the
context idling on another engine -- i.e. only affects our scratch
kernel_context.

Closes: https://gitlab.freedesktop.org/drm/intel/issues/846
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Imre Deak <imre.deak at intel.com>
Cc: Eero Tamminen <eero.t.tamminen at intel.com>
Cc: Jon Bloomfield <jon.bloomfield at intel.com>
---
 drivers/gpu/drm/i915/gt/intel_rc6.c    | 9 ++-------
 drivers/gpu/drm/i915/gt/uc/intel_guc.c | 2 +-
 drivers/gpu/drm/i915/i915_drv.h        | 4 ----
 3 files changed, 3 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 9e303c29d6e3..c47b02e2e029 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -175,13 +175,8 @@ static void gen9_rc6_enable(struct intel_rc6 *rc6)
 		GEN6_RC_CTL_RC6_ENABLE |
 		rc6_mode;
 
-	/*
-	 * WaRsDisableCoarsePowerGating:skl,cnl
-	 *   - Render/Media PG need to be disabled with RC6.
-	 */
-	if (!NEEDS_WaRsDisableCoarsePowerGating(rc6_to_i915(rc6)))
-		set(uncore, GEN9_PG_ENABLE,
-		    GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);
+	set(uncore, GEN9_PG_ENABLE,
+	    GEN9_RENDER_PG_ENABLE | GEN9_MEDIA_PG_ENABLE);
 }
 
 static void gen8_rc6_enable(struct intel_rc6 *rc6)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 5d00a3b2d914..cfa6dde0fc63 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -496,7 +496,7 @@ int intel_guc_sample_forcewake(struct intel_guc *guc)
 
 	action[0] = INTEL_GUC_ACTION_SAMPLE_FORCEWAKE;
 	/* WaRsDisableCoarsePowerGating:skl,cnl */
-	if (!HAS_RC6(dev_priv) || NEEDS_WaRsDisableCoarsePowerGating(dev_priv))
+	if (IS_GEN(dev_priv, 9))
 		action[1] = 0;
 	else
 		/* bit 0 and 1 are for Render and Media domain separately */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b7f122dccdca..776d4e4b9435 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1656,10 +1656,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define NEEDS_RC6_CTX_CORRUPTION_WA(dev_priv)	\
 	(IS_BROADWELL(dev_priv) || IS_GEN(dev_priv, 9))
 
-/* WaRsDisableCoarsePowerGating:skl,cnl */
-#define NEEDS_WaRsDisableCoarsePowerGating(dev_priv) \
-	IS_GEN_RANGE(dev_priv, 9, 10)
-
 #define HAS_GMBUS_IRQ(dev_priv) (INTEL_GEN(dev_priv) >= 4)
 #define HAS_GMBUS_BURST_READ(dev_priv) (INTEL_GEN(dev_priv) >= 10 || \
 					IS_GEMINILAKE(dev_priv) || \
-- 
2.24.1



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