[Intel-gfx] [PATCH] drm/i915/psr: Bump vblank evasion time for seamless updates

[Chris Wilson]

Quoting Chris Wilson (2019-02-13 16:21:42)
> Each set of registers we need to rewrite during a pageflip/modeset
> increases the required evasion window. Modesets with PSR enabled
> empirically take up to 350us to complete the register programming, so
> provide a corresponding boost to the evasion window.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105870
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Jani Nikula <jani.nikula at intel.com>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
> Cc: Jose Roberto de Souza <jose.souza at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_sprite.c | 20 ++++++++++++++++++--
>  1 file changed, 18 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 610398607e8e..03cafb953538 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -84,14 +84,30 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state)
>                 intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI);
>         DEFINE_WAIT(wait);
>         u32 psr_status;
> +       int evasion;
>  
>         vblank_start = adjusted_mode->crtc_vblank_start;
>         if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
>                 vblank_start = DIV_ROUND_UP(vblank_start, 2);
>  
> +       /*
> +        * Estimate how long it will take to reprogram display registers.
> +        *
> +        * As we wish to avoid changing registers across the vblank to
> +        * avoid register write tearing, where the new frame uses an incomplete
> +        * mismash of state, we aim to complete our writes before the start
> +        * of the vblank. So we must delay starting our writes until after our
> +        * evasion window.
> +        *
> +        * Each additional bit of state adds a set of registers we need to
> +        * reprogram, increasing our required evasion window.
> +        */
> +       evasion = VBLANK_EVASION_TIME_US;
> +       if (dev_priv->psr.enabled || new_crtc_state->has_psr)
> +               evasion += 300;
> +
>         /* FIXME needs to be calibrated sensibly */

In terms of calibration, how about we couple the measured time back for
use as evasion? Say use libavg so we adjust to different setups plus a
safety factor, and reduce the error message to a warning/debug?
-Chris