[Intel-gfx] [PATCH v14 09/35] drm: helper functions for hdcp2 seq_num to from u32
Daniel Vetter
daniel at ffwll.ch
Fri Feb 15 17:56:08 UTC 2019
On Fri, Feb 15, 2019 at 02:05:04PM +0530, Ramalingam C wrote:
> Library functions for endianness are aligned for 16/32/64 bits.
> But hdcp sequence numbers are 24bits(big endian).
> So for their conversion to and from u32 helper functions are developed.
>
> v2:
> Comment is updated. [Daniel]
> Reviewed-by Uma.
>
> Signed-off-by: Ramalingam C <ramalingam.c at intel.com>
> Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> Reviewed-by: Uma Shankar <uma.shankar at intel.com>
Merged into topic/mei-hdcp. With these four patches we have everything
from this series to create the mei-hdcp branch. At least worked out fine
when I tested it here locally.
Also means you need to rebase&resend, but seems like CI ignored you anyway
:-(
Cheers, Daniel
> ---
> include/drm/drm_hdcp.h | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
> index d6dfef8cff6a..7260b31af276 100644
> --- a/include/drm/drm_hdcp.h
> +++ b/include/drm/drm_hdcp.h
> @@ -252,4 +252,22 @@ struct hdcp2_dp_errata_stream_type {
> #define HDCP_2_2_HDMI_RXSTATUS_READY(x) ((x) & BIT(2))
> #define HDCP_2_2_HDMI_RXSTATUS_REAUTH_REQ(x) ((x) & BIT(3))
>
> +/*
> + * Helper functions to convert 24bit big endian hdcp sequence number to
> + * host format and back
> + */
> +static inline
> +u32 drm_hdcp2_seq_num_to_u32(u8 seq_num[HDCP_2_2_SEQ_NUM_LEN])
> +{
> + return (u32)(seq_num[2] | seq_num[1] << 8 | seq_num[0] << 16);
> +}
> +
> +static inline
> +void drm_hdcp2_u32_to_seq_num(u8 seq_num[HDCP_2_2_SEQ_NUM_LEN], u32 val)
> +{
> + seq_num[0] = val >> 16;
> + seq_num[1] = val >> 8;
> + seq_num[2] = val;
> +}
> +
> #endif
> --
> 2.7.4
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
More information about the Intel-gfx
mailing list