[Intel-gfx] [PATCH 2/2] drm/i915: don't check internal state in PP_STATUS

[Lucas De Marchi]

Instead of checking the bits that give the internal machine state we can
simply rely on the information from the other bits: 1) on or off,
2) transitioning or not.

Bit 31 has the "Panel Power On Status"
Bits 29:28 has the "Power Sequence Progress"

So, wait_panel_on() only needs to wait for bit 31 to indicate it's on
and bits 29:28 to indicate there's no transition in progress.

>From my limited test that includes the cycle delay, so we are safe with
only checking those bits, like we do in wait_panel_off().

Admittedly this needs more test, so let CI go through more platforms.

Cc: Clint Taylor <Clinton.A.Taylor at intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index e1a051c0fbfe..9c16b69043cc 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2315,8 +2315,8 @@ static void intel_dp_prepare(struct intel_encoder *encoder,
 	}
 }
 
-#define IDLE_ON_MASK		(PP_ON | PP_SEQUENCE_MASK | 0                     | PP_SEQUENCE_STATE_MASK)
-#define IDLE_ON_VALUE   	(PP_ON | PP_SEQUENCE_NONE | 0                     | PP_SEQUENCE_STATE_ON_IDLE)
+#define IDLE_ON_MASK		(PP_ON | PP_SEQUENCE_MASK | PP_CYCLE_DELAY_ACTIVE | 0)
+#define IDLE_ON_VALUE		(PP_ON | PP_SEQUENCE_NONE | 0			  | 0)
 
 #define IDLE_OFF_MASK		(PP_ON | PP_SEQUENCE_MASK | 0                     | 0)
 #define IDLE_OFF_VALUE		(0     | PP_SEQUENCE_NONE | 0                     | 0)
-- 
2.20.0