[Intel-gfx] [PATCH v3 1/3] drm/i915: introduce REG_BIT() and REG_GENMASK() to define register contents
Michal Wajdeczko
michal.wajdeczko at intel.com
Wed Feb 27 23:06:14 UTC 2019
On Wed, 27 Feb 2019 18:02:36 +0100, Jani Nikula <jani.nikula at intel.com>
wrote:
> @@ -116,6 +116,34 @@
> * #define GEN8_BAR _MMIO(0xb888)
> */
> +/**
> + * REG_BIT() - Prepare a u32 bit value
> + * @__n: 0-based bit number
> + *
> + * Local wrapper for BIT() to force u32, with compile time checks.
> + *
> + * @return: Value with bit @__n set.
> + */
> +#define REG_BIT(__n) \
> + ((u32)(BIT(__n) + \
> + BUILD_BUG_ON_ZERO(__builtin_constant_p(__n) && \
> + ((__n) < 0 || (__n) > 31))))
Maybe to simplify the code we can define this macro using macro below:
#define REG_BIT(__n) REG_GENMASK(__n, __n)
> +
> +/**
> + * REG_GENMASK() - Prepare a continuous u32 bitmask
> + * @__high: 0-based high bit
> + * @__low: 0-based low bit
> + *
> + * Local wrapper for GENMASK() to force u32, with compile time checks.
> + *
> + * @return: Continuous bitmask from @__high to @__low, inclusive.
> + */
> +#define REG_GENMASK(__high, __low) \
> + ((u32)(GENMASK(__high, __low) + \
> + BUILD_BUG_ON_ZERO(__builtin_constant_p(__high) && \
> + __builtin_constant_p(__low) && \
> + ((__low) < 0 || (__high) > 31 || (__low) > (__high)))))
> +
nit: Since we are defining new set of macros, do we really have to follow
naming of the underlying macros? maybe we can can have clear new names:
REG_BIT(n)
REG_BITS(hi,low)
Thanks,
Michal
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