[Intel-gfx] [PATCH v3 3/3] drm/i915: use REG_FIELD_PREP() to define register bitfield values

kbuild test robot lkp at intel.com
Thu Feb 28 04:49:43 UTC 2019


Hi Jani,

I love your patch! Yet something to improve:

[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20190227]
[cannot apply to v5.0-rc8]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Jani-Nikula/drm-i915-introduce-macros-to-define-register-contents/20190228-093058
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
reproduce:
        # apt-get install sparse
        make ARCH=x86_64 allmodconfig
        make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__'

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/i915/intel_display.c:1165:22: sparse: error: Expected constant expression in case statement
   drivers/gpu/drm/i915/intel_display.c:1168:22: sparse: error: Expected constant expression in case statement
   drivers/gpu/drm/i915/intel_display.c:1171:22: sparse: error: Expected constant expression in case statement
   drivers/gpu/drm/i915/intel_display.c:1174:22: sparse: error: Expected constant expression in case statement

vim +1165 drivers/gpu/drm/i915/intel_display.c

040484af Jesse Barnes   2011-01-03  1147  
4f8036a2 Tvrtko Ursulin 2016-10-13  1148  void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
ea0760cf Jesse Barnes   2011-01-04  1149  {
f0f59a00 Ville Syrjälä  2015-11-18  1150  	i915_reg_t pp_reg;
ea0760cf Jesse Barnes   2011-01-04  1151  	u32 val;
10ed55e4 Ville Syrjälä  2018-05-23  1152  	enum pipe panel_pipe = INVALID_PIPE;
0de3b485 Thomas Jarosch 2011-08-25  1153  	bool locked = true;
ea0760cf Jesse Barnes   2011-01-04  1154  
4f8036a2 Tvrtko Ursulin 2016-10-13  1155  	if (WARN_ON(HAS_DDI(dev_priv)))
bedd4dba Jani Nikula    2014-08-22  1156  		return;
bedd4dba Jani Nikula    2014-08-22  1157  
4f8036a2 Tvrtko Ursulin 2016-10-13  1158  	if (HAS_PCH_SPLIT(dev_priv)) {
bedd4dba Jani Nikula    2014-08-22  1159  		u32 port_sel;
bedd4dba Jani Nikula    2014-08-22  1160  
44cb734c Imre Deak      2016-08-10  1161  		pp_reg = PP_CONTROL(0);
44cb734c Imre Deak      2016-08-10  1162  		port_sel = I915_READ(PP_ON_DELAYS(0)) & PANEL_PORT_SELECT_MASK;
bedd4dba Jani Nikula    2014-08-22  1163  
4c23dea4 Ville Syrjälä  2018-05-18  1164  		switch (port_sel) {
4c23dea4 Ville Syrjälä  2018-05-18 @1165  		case PANEL_PORT_SELECT_LVDS:
a44628b9 Ville Syrjälä  2018-05-14  1166  			intel_lvds_port_enabled(dev_priv, PCH_LVDS, &panel_pipe);
4c23dea4 Ville Syrjälä  2018-05-18  1167  			break;
4c23dea4 Ville Syrjälä  2018-05-18  1168  		case PANEL_PORT_SELECT_DPA:
4c23dea4 Ville Syrjälä  2018-05-18  1169  			intel_dp_port_enabled(dev_priv, DP_A, PORT_A, &panel_pipe);
4c23dea4 Ville Syrjälä  2018-05-18  1170  			break;
4c23dea4 Ville Syrjälä  2018-05-18  1171  		case PANEL_PORT_SELECT_DPC:
4c23dea4 Ville Syrjälä  2018-05-18  1172  			intel_dp_port_enabled(dev_priv, PCH_DP_C, PORT_C, &panel_pipe);
4c23dea4 Ville Syrjälä  2018-05-18  1173  			break;
4c23dea4 Ville Syrjälä  2018-05-18  1174  		case PANEL_PORT_SELECT_DPD:
4c23dea4 Ville Syrjälä  2018-05-18  1175  			intel_dp_port_enabled(dev_priv, PCH_DP_D, PORT_D, &panel_pipe);
4c23dea4 Ville Syrjälä  2018-05-18  1176  			break;
4c23dea4 Ville Syrjälä  2018-05-18  1177  		default:
4c23dea4 Ville Syrjälä  2018-05-18  1178  			MISSING_CASE(port_sel);
4c23dea4 Ville Syrjälä  2018-05-18  1179  			break;
4c23dea4 Ville Syrjälä  2018-05-18  1180  		}
4f8036a2 Tvrtko Ursulin 2016-10-13  1181  	} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
bedd4dba Jani Nikula    2014-08-22  1182  		/* presumably write lock depends on pipe, not port select */
44cb734c Imre Deak      2016-08-10  1183  		pp_reg = PP_CONTROL(pipe);
bedd4dba Jani Nikula    2014-08-22  1184  		panel_pipe = pipe;
ea0760cf Jesse Barnes   2011-01-04  1185  	} else {
f0d2b758 Ville Syrjälä  2018-05-18  1186  		u32 port_sel;
f0d2b758 Ville Syrjälä  2018-05-18  1187  
44cb734c Imre Deak      2016-08-10  1188  		pp_reg = PP_CONTROL(0);
f0d2b758 Ville Syrjälä  2018-05-18  1189  		port_sel = I915_READ(PP_ON_DELAYS(0)) & PANEL_PORT_SELECT_MASK;
f0d2b758 Ville Syrjälä  2018-05-18  1190  
f0d2b758 Ville Syrjälä  2018-05-18  1191  		WARN_ON(port_sel != PANEL_PORT_SELECT_LVDS);
a44628b9 Ville Syrjälä  2018-05-14  1192  		intel_lvds_port_enabled(dev_priv, LVDS, &panel_pipe);
ea0760cf Jesse Barnes   2011-01-04  1193  	}
ea0760cf Jesse Barnes   2011-01-04  1194  
ea0760cf Jesse Barnes   2011-01-04  1195  	val = I915_READ(pp_reg);
ea0760cf Jesse Barnes   2011-01-04  1196  	if (!(val & PANEL_POWER_ON) ||
ec49ba2d Jani Nikula    2014-08-21  1197  	    ((val & PANEL_UNLOCK_MASK) == PANEL_UNLOCK_REGS))
ea0760cf Jesse Barnes   2011-01-04  1198  		locked = false;
ea0760cf Jesse Barnes   2011-01-04  1199  
e2c719b7 Rob Clark      2014-12-15  1200  	I915_STATE_WARN(panel_pipe == pipe && locked,
ea0760cf Jesse Barnes   2011-01-04  1201  	     "panel assertion failure, pipe %c regs locked\n",
9db4a9c7 Jesse Barnes   2011-02-07  1202  	     pipe_name(pipe));
ea0760cf Jesse Barnes   2011-01-04  1203  }
ea0760cf Jesse Barnes   2011-01-04  1204  

:::::: The code at line 1165 was first introduced by commit
:::::: 4c23dea48b0d8d9da2ac0911f8cee105f4394281 drm/i915: Implement the missing bits of assert_panel_unlocked()

:::::: TO: Ville Syrjälä <ville.syrjala at linux.intel.com>
:::::: CC: Ville Syrjälä <ville.syrjala at linux.intel.com>

---
0-DAY kernel test infrastructure                Open Source Technology Center
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