[Intel-gfx] [PATCH] drm/i915: Finalize Wa_1408961008:icl

[Matt Roper]

On Thu, Feb 28, 2019 at 07:36:39PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> The icl wm1+ underrun w/a has been added to the spec. It changed
> slightly from the previous incarnation by requiring that we mirror
> the lines watermark and the ignore lines bit from WM0 into WM1.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Matches the new workaround details that were added to the bspec
yesterday.

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 4c0e43caa5cd..9c97a95c1816 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4467,11 +4467,15 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
>  			wm = &cstate->wm.skl.optimal.planes[plane_id];
>  			memset(&wm->wm[level], 0, sizeof(wm->wm[level]));
>  
> -			/* W/A for underruns with WM1+ disabled */
> +			/*
> +			 * Wa_1408961008:icl
> +			 * Underruns with WM1+ disabled
> +			 */
>  			if (IS_ICELAKE(dev_priv) &&
>  			    level == 1 && wm->wm[0].plane_en) {
>  				wm->wm[level].plane_res_b = wm->wm[0].plane_res_b;
> -				wm->wm[level].ignore_lines = true;
> +				wm->wm[level].plane_res_l = wm->wm[0].plane_res_l;
> +				wm->wm[level].ignore_lines = wm->wm[0].ignore_lines;
>  			}
>  		}
>  	}
> -- 
> 2.19.2
> 
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-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795