[Intel-gfx] [PATCH 37/39] drm/i915: Track the context's seqno in its own timeline HWSP

[Chris Wilson]

Quoting Chris Wilson (2019-01-02 09:41:37)
> Now that we have allocated ourselves a cacheline to store a breadcrumb,
> we can emit a write from the GPU into the timeline's HWSP of the
> per-context seqno as we complete each request. This drops the mirroring
> of the per-engine HWSP and allows each context to operate independently.
> We do not need to unwind the per-context timeline, and so requests are
> always consistent with the timeline breadcrumb, greatly simplifying the
> completion checks as we no longer need to be concerned about the
> global_seqno changing mid check.

What I forgot about when using STORE_DWORD_IMM are the generations where
that either explodes (snb + vcs) or where it only supports physical
addresses (gen2 + early gen3).

Sigh. One idea is to make the timeline use the real HWSP for gen2-6,
still keeping the per-context timeline for gen7 so that one day we can
do request shuffling. Alternatively, use physical address for gen2, and
MI_FLUSH_DW for gen6/xcs.
-Chris