[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/6] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/6] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks
URL   : https://patchwork.freedesktop.org/series/54692/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
218d4fcb7953 drm/i915/psr: Allow PSR2 to be enabled when debugfs asks
10edb2d95dc6 drm/i915: Refactor PSR status debugfs
-:22: WARNING:BAD_SIGN_OFF: Use a single space after To:
#22: 
To:

-:22: ERROR:BAD_SIGN_OFF: Unrecognized email address: ''
#22: 
To:

total: 1 errors, 1 warnings, 0 checks, 142 lines checked
4ad5fd0a930e drm/i915/psr: Make intel_psr_set_debugfs_mode() only handle PSR mode
3a8341314414 drm/i915/psr: Do not print last attempted entry or exit in PSR debugfs while in PSR2
907aac6f75be drm/i915: Add PSR2 selective update status registers and bits definitions
-:33: WARNING:LONG_LINE: line over 100 characters
#33: FILE: drivers/gpu/drm/i915/i915_reg.h:4278:
+#define _PSR2_SU_STATUS(index)		_MMIO(_PICK_EVEN((index), _PSR2_SU_STATUS_0, _PSR2_SU_STATUS_1))

total: 0 errors, 1 warnings, 0 checks, 15 lines checked
9914c810a78e drm/i915/debugfs: Print PSR selective update status register values