[Intel-gfx] drm/i915: Watchdog timeout: DRM kernel interface to set the timeout

Tvrtko Ursulin tvrtko.ursulin at linux.intel.com
Mon Jan 7 17:20:38 UTC 2019


On 07/01/2019 17:00, Tvrtko Ursulin wrote:
> 
> On 07/01/2019 12:38, Tvrtko Ursulin wrote:
> 
> [snip]
> 
>>> +#define GEN8_TIMESTAMP_CNTS_PER_USEC 12
>>> +#define GEN9_LP_TIMESTAMP_CNTS_PER_USEC 19
>>> +static inline u32 cs_timestamp_in_us(struct drm_i915_private *dev_priv)
>>> +{
>>> +    u32 cs_timestamp_base = dev_priv->cs_timestamp_base;
>>> +
>>> +    if (cs_timestamp_base)
>>> +        return cs_timestamp_base;
>>> +
>>> +    switch (INTEL_GEN(dev_priv)) {
>>> +    default:
>>> +        MISSING_CASE(INTEL_GEN(dev_priv));
>>> +        /* fall through */
>>> +    case 9:
>>> +        cs_timestamp_base = IS_GEN9_LP(dev_priv) ?
>>> +                    GEN9_LP_TIMESTAMP_CNTS_PER_USEC :
>>> +                    GEN8_TIMESTAMP_CNTS_PER_USEC;
>>> +        break;
>>> +    case 8:
>>> +        cs_timestamp_base = GEN8_TIMESTAMP_CNTS_PER_USEC;
>>> +        break;
>>> +    }
>>> +
>>> +    dev_priv->cs_timestamp_base = cs_timestamp_base;
>>> +    return cs_timestamp_base;
>>> +}
>>
>> We already have RUNTIME_INFO(i915)->cs_timestamp_frequency_khz and 
>> read_timestamp_frequency which sets it.
> 
> Here I missed the mark, please ignore.

One thing I am not sure though is whether CTC_MODE register affects this 
clock. In other words should this code read it to get the correct 
effective tick duration.

Bspec chain of Watchdog Timers (14970) -> Reported Timestamp Count 
(12610) ->
Timestamp Bases (13569) does not answer that for me.

Regards,

Tvrtko


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