[Intel-gfx] [PATCH 5/7] drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only)

[Chris Wilson]

Quoting Tvrtko Ursulin (2019-01-08 14:35:45)
> 
> On 08/01/2019 14:22, Joonas Lahtinen wrote:
> > Quoting Tvrtko Ursulin (2019-01-08 13:22:50)
> >> +++ b/include/uapi/drm/i915_drm.h
> >> @@ -1486,9 +1486,52 @@ struct drm_i915_gem_context_param {
> >>   #define   I915_CONTEXT_MAX_USER_PRIORITY       1023 /* inclusive */
> >>   #define   I915_CONTEXT_DEFAULT_PRIORITY                0
> >>   #define   I915_CONTEXT_MIN_USER_PRIORITY       -1023 /* inclusive */
> >> +       /*
> >> +        * When using the following param, value should be a pointer to
> >> +        * drm_i915_gem_context_param_sseu.
> >> +        */
> >> +#define I915_CONTEXT_PARAM_SSEU                0x7
> >>          __u64 value;
> >>   };
> > 
> > Maybe we should amend some comments?
> > 
> > /*
> >   * NOTE: Can currently only be used to switch between VME enabled
> >   *       slice configuration vs. full on Icelake (Gen11)
> >   *
> >   * NOTE: Slice configuration requests are ignored when perf is enabled.
> >   */
> 
> At first I thought a good idea but on second thought do we want to put 
> such implementation details into uapi headers? Second note maybe, but 
> first I have a feeling is best left out since headers and kernel are not 
> strictly tied up in deployment. Don't know, third opinion from Chris?

If it affects uAPI, then document it in the headers. I would say that
OA/i915_perf overriding the values specified by the user deserves the
strong mention. The current set of accepted values, not so strong but we
should say what happens as a result of PARAM_SSEU. Something along the
lines of it setting the RPCS register for the subslice configuration as
specified (bonus points for layman terms of what that entails in usage).
"Acceptable values are:"
-Chris