[Intel-gfx] [PATCH 00/13] Enable/disable gamma/csc dynamically and fix C8

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

I figured I'd post this before we get too deep in the rabbit hole with
the icl stuff. This is just the first part of my color mgmt stuff I've
had cooking for far too long. The rest has to do with expanding the
support for higher precision gamma modes and the pipe csc to all
possible platforms, but that part is not ready yet.

Entire series available here:
git://github.com/vsyrjala/linux.git gamma_mode_10_base

Ville Syrjälä (13):
  drm/i915: Clean up intel_plane_atomic_check_with_state()
  drm/i915: Split the gamma/csc enable bits from the plane_ctl()
    function
  drm/i915: Precompute gamma_mode
  drm/i915: Constify the state arguments to the color management stuff
  drm/i915: Pull GAMMA_MODE write out from haswell_load_luts()
  drm/i915: Split color mgmt based on single vs. double buffered
    registers
  drm/i915: Move LUT programming to happen after vblank waits
  drm/i915: Populate gamma_mode for all platforms
  drm/i915: Track pipe gamma enable/disable in crtc state
  drm/i915: Track pipe csc enable in crtc state
  drm/i915: Turn off pipe gamma when it's not needed.
  drm/i915: Turn off pipe CSC when it's not needed
  drm/i915: Disable pipe gamma when C8 pixel format is used

 drivers/gpu/drm/i915/i915_drv.h           |   4 +-
 drivers/gpu/drm/i915/i915_reg.h           |  22 +-
 drivers/gpu/drm/i915/intel_atomic_plane.c |  41 +--
 drivers/gpu/drm/i915/intel_color.c        | 386 ++++++++++++++--------
 drivers/gpu/drm/i915/intel_display.c      | 257 +++++++++++---
 drivers/gpu/drm/i915/intel_drv.h          |  14 +-
 drivers/gpu/drm/i915/intel_sprite.c       |  67 +++-
 7 files changed, 563 insertions(+), 228 deletions(-)

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2.19.2