[Intel-gfx] [PATCH 5/7] drm/i915: handle interrupts from the OA unit

[Chris Wilson]

Quoting Lionel Landwerlin (2019-01-16 15:36:20)
> @@ -1877,6 +1883,21 @@ struct drm_i915_private {
>                         wait_queue_head_t poll_wq;
>                         bool pollin;
>  
> +                       /**
> +                        * Atomic counter incremented by the interrupt
> +                        * handling code for each OA half full interrupt
> +                        * received.
> +                        */
> +                       atomic64_t half_full_count;
> +
> +                       /**
> +                        * Copy of the atomic half_full_count that was last
> +                        * processed in the i915-perf driver. If both counters
> +                        * differ, there is data available to read in the OA
> +                        * buffer.
> +                        */
> +                       u64 half_full_count_last;

Eh? But why a relatively expensive atomic64. You only need one bit, and
reading the tail pointer from WB memory should just be cheap. You should
be able to sample the perf ringbuffer pointers very cheaply... What am I
missing?
-Chris