[Intel-gfx] [PATCH v2 4/4] drm/i915: introduce _FIELD() to define register field values

Jani Nikula jani.nikula at intel.com
Thu Jan 17 12:14:03 UTC 2019


Slightly verbose, but does away with hand rolled shifts. Ties the field
values with the mask defining the field.

Unfortunately we have to make a local copy of FIELD_PREP() to evaluate
to a constant expression. But with this, we can ensure the mask is
non-zero, power of 2, fits u32, and the value fits the mask (when the
value is a constant expression).

v2:
 - add build-time checks with BUILD_BUG_ON_ZERO()
 - rename to just _FIELD() due to regmap.h REG_FIELD() clash

Cc: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula at intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 64 +++++++++++++++++++++------------
 1 file changed, 41 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1b5cbae9c11d..a07b61cec078 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -62,8 +62,9 @@
  * significant to least significant bit. Indent the register content macros
  * using two extra spaces between ``#define`` and the macro name.
  *
- * Define bit fields using ``_MASK(h, l)``. Define bit field contents so that
- * they are already shifted in place, and can be directly OR'd. For convenience,
+ * Define bit fields using ``_MASK(h, l)``. Define bit field contents using
+ * ``_FIELD(mask, value)``. This will define the values already shifted in
+ * place, so they can be directly OR'd together. For convenience,
  * function-like macros may be used to define bit fields, but do note that the
  * macros may be needed to read as well as write the register contents.
  *
@@ -107,9 +108,9 @@
  *  #define FOO(pipe)                   _MMIO_PIPE(pipe, _FOO_A, _FOO_B)
  *  #define   FOO_ENABLE                _BIT(31)
  *  #define   FOO_MODE_MASK             _MASK(19, 16)
- *  #define   FOO_MODE_BAR              (0 << 16)
- *  #define   FOO_MODE_BAZ              (1 << 16)
- *  #define   FOO_MODE_QUX_SNB          (2 << 16)
+ *  #define   FOO_MODE_BAR              _FIELD(FOO_MODE_MASK, 0)
+ *  #define   FOO_MODE_BAZ              _FIELD(FOO_MODE_MASK, 1)
+ *  #define   FOO_MODE_QUX_SNB          _FIELD(FOO_MODE_MASK, 2)
  *
  *  #define BAR                         _MMIO(0xb000)
  *  #define GEN8_BAR                    _MMIO(0xb888)
@@ -132,6 +133,23 @@
  */
 #define _MASK(__high, __low)	((u32)GENMASK(__high, __low))
 
+#define __POWER_OF_2(x)	((x) && (((x) & ((x) - 1)) == 0))
+
+/*
+ * Macro for defining register field values. Shifts the value to the register
+ * field defined by mask.
+ *
+ * Local version of FIELD_PREP() to evaluate to an integer constant expression
+ * to allow use in e.g. case labels. Do *not* use outside of this file. Use
+ * FIELD_PREP() instead.
+ */
+#define _FIELD(__mask, __val)						\
+	((((typeof(__mask))(__val) << __bf_shf(__mask)) & (__mask)) +	\
+	 BUILD_BUG_ON_ZERO(!__builtin_constant_p(__mask)) +		\
+	 BUILD_BUG_ON_ZERO((__mask) == 0 || (__mask) > U32_MAX) +	\
+	 BUILD_BUG_ON_ZERO(!__POWER_OF_2((__mask) + (1ULL << __bf_shf(__mask)))) + \
+	 BUILD_BUG_ON_ZERO(__builtin_choose_expr(__builtin_constant_p(__val), (~((__mask) >> __bf_shf(__mask)) & (__val)), 0)))
+
 typedef struct {
 	u32 reg;
 } i915_reg_t;
@@ -4677,25 +4695,25 @@ enum {
  */
 #define   PP_READY			_BIT(30)
 #define   PP_SEQUENCE_MASK		_MASK(29, 28)
-#define   PP_SEQUENCE_NONE		(0 << 28)
-#define   PP_SEQUENCE_POWER_UP		(1 << 28)
-#define   PP_SEQUENCE_POWER_DOWN	(2 << 28)
+#define   PP_SEQUENCE_NONE		_FIELD(PP_SEQUENCE_MASK, 0)
+#define   PP_SEQUENCE_POWER_UP		_FIELD(PP_SEQUENCE_MASK, 1)
+#define   PP_SEQUENCE_POWER_DOWN	_FIELD(PP_SEQUENCE_MASK, 2)
 #define   PP_CYCLE_DELAY_ACTIVE		_BIT(27)
 #define   PP_SEQUENCE_STATE_MASK	_MASK(3, 0)
-#define   PP_SEQUENCE_STATE_OFF_IDLE	(0x0 << 0)
-#define   PP_SEQUENCE_STATE_OFF_S0_1	(0x1 << 0)
-#define   PP_SEQUENCE_STATE_OFF_S0_2	(0x2 << 0)
-#define   PP_SEQUENCE_STATE_OFF_S0_3	(0x3 << 0)
-#define   PP_SEQUENCE_STATE_ON_IDLE	(0x8 << 0)
-#define   PP_SEQUENCE_STATE_ON_S1_0	(0x9 << 0)
-#define   PP_SEQUENCE_STATE_ON_S1_2	(0xa << 0)
-#define   PP_SEQUENCE_STATE_ON_S1_3	(0xb << 0)
-#define   PP_SEQUENCE_STATE_RESET	(0xf << 0)
+#define   PP_SEQUENCE_STATE_OFF_IDLE	_FIELD(PP_SEQUENCE_STATE_MASK, 0x0)
+#define   PP_SEQUENCE_STATE_OFF_S0_1	_FIELD(PP_SEQUENCE_STATE_MASK, 0x1)
+#define   PP_SEQUENCE_STATE_OFF_S0_2	_FIELD(PP_SEQUENCE_STATE_MASK, 0x2)
+#define   PP_SEQUENCE_STATE_OFF_S0_3	_FIELD(PP_SEQUENCE_STATE_MASK, 0x3)
+#define   PP_SEQUENCE_STATE_ON_IDLE	_FIELD(PP_SEQUENCE_STATE_MASK, 0x8)
+#define   PP_SEQUENCE_STATE_ON_S1_0	_FIELD(PP_SEQUENCE_STATE_MASK, 0x9)
+#define   PP_SEQUENCE_STATE_ON_S1_2	_FIELD(PP_SEQUENCE_STATE_MASK, 0xa)
+#define   PP_SEQUENCE_STATE_ON_S1_3	_FIELD(PP_SEQUENCE_STATE_MASK, 0xb)
+#define   PP_SEQUENCE_STATE_RESET	_FIELD(PP_SEQUENCE_STATE_MASK, 0xf)
 
 #define _PP_CONTROL			0x61204
 #define PP_CONTROL(pps_idx)		_MMIO_PPS(pps_idx, _PP_CONTROL)
 #define  PANEL_UNLOCK_MASK		_MASK(31, 16)
-#define  PANEL_UNLOCK_REGS		(0xabcd << 16)
+#define  PANEL_UNLOCK_REGS		_FIELD(PANEL_UNLOCK_MASK, 0xabcd)
 #define  BXT_POWER_CYCLE_DELAY_MASK	_MASK(8, 4)
 #define  EDP_FORCE_VDD			_BIT(3)
 #define  EDP_BLC_ENABLE			_BIT(2)
@@ -4705,11 +4723,11 @@ enum {
 #define _PP_ON_DELAYS			0x61208
 #define PP_ON_DELAYS(pps_idx)		_MMIO_PPS(pps_idx, _PP_ON_DELAYS)
 #define  PANEL_PORT_SELECT_MASK		_MASK(31, 30)
-#define  PANEL_PORT_SELECT_LVDS		(0 << 30)
-#define  PANEL_PORT_SELECT_DPA		(1 << 30)
-#define  PANEL_PORT_SELECT_DPC		(2 << 30)
-#define  PANEL_PORT_SELECT_DPD		(3 << 30)
-#define  PANEL_PORT_SELECT_VLV(port)	((port) << 30)
+#define  PANEL_PORT_SELECT_LVDS		_FIELD(PANEL_PORT_SELECT_MASK, 0)
+#define  PANEL_PORT_SELECT_DPA		_FIELD(PANEL_PORT_SELECT_MASK, 1)
+#define  PANEL_PORT_SELECT_DPC		_FIELD(PANEL_PORT_SELECT_MASK, 2)
+#define  PANEL_PORT_SELECT_DPD		_FIELD(PANEL_PORT_SELECT_MASK, 3)
+#define  PANEL_PORT_SELECT_VLV(port)	_FIELD(PANEL_PORT_SELECT_MASK, port)
 #define  PANEL_POWER_UP_DELAY_MASK	_MASK(28, 16)
 #define  PANEL_LIGHT_ON_DELAY_MASK	_MASK(12, 0)
 
-- 
2.20.1



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