[Intel-gfx] [RFC] drm/i915/dp: Preliminary support for 2 pipe 1 port mode for 5K at 120

Maarten Lankhorst maarten.lankhorst at linux.intel.com
Wed Jan 23 09:20:10 UTC 2019


Op 22-01-2019 om 22:12 schreef Manasi Navare:
> On Gen 11 platform, to enable resolutions like 5K at 120 where
> the pixel clock is greater than pipe pixel rate, we need to split it across
> 2 pipes and enable it using DSC and big joiner. In order to support this
> dual pipe single port mode, we need to link two crtcs involved in this
> ganged mode.
>
> This patch is a RFC patch that links two crtcs using linked_crtc pointer
> in intel_crtc_state and slave to indicate if the crtc is a master or slave.
> Here the HW necessitates the first CRTC to be the master CRTC through which
> the final output will be driven and the next consecutive CRTC should be
> slave crtc.
>
> This is currently not tested, but I wanted to get some inputs on this approach.
> The idea is to follow the same approach used in Ganged plane mode for NV12
> planes.
>
> Suggested-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>,
> Matt Roper <matthew.d.roper at intel.com>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 63 ++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_drv.h     |  6 +++
>  2 files changed, 69 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 2fa9f4aec08e..9910dad7371b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -10900,6 +10900,63 @@ static bool check_single_encoder_cloning(struct drm_atomic_state *state,
>  	return true;
>  }
>  
> +static bool icl_dual_pipe_mode(struct drm_i915_private *dev_priv,
> +			       struct drm_crtc_state *crtc_state)
> +{
> +	if (crtc_state->mode.clock <= 2 * dev_priv->max_cdclk_freq)
> +		return false;
> +
> +	return true;
> +}
> +
> +static int icl_set_linked_crtcs(struct drm_atomic_state *state)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(state->dev);
> +	struct drm_crtc *crtc;
> +	struct drm_crtc_state *crtc_state;
> +	struct intel_crtc_state *linked_state = NULL;
> +	struct intel_crtc *slave_crtc = NULL;
> +	int i;
> +
> +	for_each_new_crtc_in_state(state, crtc, crtc_state, i) {
> +		struct intel_crtc_state *pipe_config =
> +			to_intel_crtc_state(crtc_state);
> +		struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> +
> +		if (crtc_state->active)
> +			continue;
> +
> +		if (!icl_dual_pipe_mode(dev_priv, crtc_state))
> +			continue;
> +
> +		if (!pipe_config->linked_crtc) {
> +			slave_crtc = intel_get_crtc_for_pipe(dev_priv,
> +							     intel_crtc->pipe + 1);
> +			if (!slave_crtc)
> +				return PTR_ERR(slave_crtc);
> +
> +			linked_state = intel_atomic_get_crtc_state(state, slave_crtc);
> +			if (IS_ERR(linked_state))
> +				return PTR_ERR(linked_state);
> +
> +			pipe_config->linked_crtc = slave_crtc;
> +			pipe_config->slave = false;
> +			linked_state->linked_crtc = intel_crtc;
> +			linked_state->slave = true;
> +			// Update the intel_state->active_crtcs if needed
> +
> +			DRM_DEBUG_KMS("Using [CRTC:%d:%s] as master and [CRTC:%d:%s] as slave\n",
> +				      intel_crtc->base.base.id, intel_crtc->base.name,
> +				      slave_crtc->base.base.id, slave_crtc->base.name);
> +
> +			break;
> +		}
> +	}
> +
> +	return 0;
> +
> +}
> +
>  static int icl_add_linked_planes(struct intel_atomic_state *state)
>  {
>  	struct intel_plane *plane, *linked;
> @@ -12702,6 +12759,12 @@ static int intel_atomic_check(struct drm_device *dev,
>  	if (ret)
>  		return ret;
>  
> +	if (INTEL_GEN(dev_priv) >= 11) {
> +		ret = icl_set_linked_crtcs(state);
> +		if (ret)
> +			return ret;
> +	}
> +
>  	for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
>  		struct intel_crtc_state *pipe_config =
>  			to_intel_crtc_state(crtc_state);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 33b733d37706..f8bbed525ec3 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -959,6 +959,12 @@ struct intel_crtc_state {
>  
>  	/* Forward Error correction State */
>  	bool fec_enable;
> +
> +	/* Pointer to linked crtc in dual pipe mode */
> +	struct intel_crtc *linked_crtc;
> +
> +	/* Flag to indicate whether this crtc is master or slave */
> +	bool slave;
>  };
>  
>  struct intel_crtc {

Hey,

Looks good for a first iteration, and I think with some tweaks it will work well.

The link should be broken in the first for_each_oldnew_crtc_in_state loop in
intel_atomic_check, after needs_modeset() is evaluated to true, but before
the early return on !enable.

After that we should call icl_set_linked_crtcs before the if (any_ms) branch,
making sure we try to re-establish to the same if needs_modeset() == false, but note
that the linked pipe might not be available, in which case we need to unset
crtc_state->update_pipe and set crtc_state->mode_changed again to establish the new
mapping and undo the fastset.

It sounds complicated, but it will be similar to the nv12 planes mapping, except only
on modeset, with special code for undoing fastset.

Your code may also not work if we try to set a 5k120 mode on the last pipe, it will
try to get a nonexistent pipe or dereference random memory, it might be better to
create a separate get_dual_pipe_crtc() function which returns the correct crtc or NULL.

~Maarten



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