[Intel-gfx] [PATCH i-g-t 1/2] i915/gem_exec_latency: Normalize results into ns

[Chris Wilson]

Present the latency results in nanoseconds not RCS cycles.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 tests/i915/gem_exec_latency.c | 38 +++++++++++++++++++++++++++++++----
 1 file changed, 34 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_exec_latency.c b/tests/i915/gem_exec_latency.c
index de16322a6..ea44adc14 100644
--- a/tests/i915/gem_exec_latency.c
+++ b/tests/i915/gem_exec_latency.c
@@ -59,6 +59,7 @@
 #define PREEMPT 0x2
 
 static unsigned int ring_size;
+static double rcs_clock;
 
 static void
 poll_ring(int fd, unsigned ring, const char *name)
@@ -207,7 +208,7 @@ static void latency_on_ring(int fd,
 		igt_cork_unplug(&c);
 
 	gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_GTT, 0);
-	gpu_latency = (results[repeats-1] - results[0]) / (double)(repeats-1);
+	gpu_latency = (results[repeats-1] - results[1]) / (double)(repeats-2);
 
 	gem_set_domain(fd, obj[2].handle,
 		       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
@@ -238,10 +239,11 @@ static void latency_on_ring(int fd,
 	igt_assert(offset == obj[2].offset);
 
 	gem_set_domain(fd, obj[1].handle, I915_GEM_DOMAIN_GTT, 0);
-	igt_info("%s: dispatch latency: %.2f, execution latency: %.2f (target %.2f)\n",
+	igt_info("%s: dispatch latency: %.1fns, execution latency: %.1fns (target %.1fns)\n",
 		 name,
-		 (end - start) / (double)repeats,
-		 gpu_latency, (results[repeats - 1] - results[0]) / (double)(repeats - 1));
+		 (end - start) / (double)repeats * rcs_clock,
+		 gpu_latency * rcs_clock,
+		 (results[repeats - 1] - results[0]) / (double)(repeats - 1) * rcs_clock);
 
 	munmap(map, 64*1024);
 	munmap(results, 4096);
@@ -620,6 +622,30 @@ rthog_latency_on_ring(int fd, unsigned int engine, const char *name, unsigned in
 	munmap(results, MMAP_SZ);
 }
 
+static double clockrate(void)
+{
+	volatile uint32_t *reg;
+	uint32_t r_start, r_end;
+	struct timespec tv;
+	uint64_t t_start, t_end;
+	uint64_t elapsed;
+
+	reg = (volatile uint32_t *)((volatile char *)igt_global_mmio + RCS_TIMESTAMP);
+
+	t_start = igt_nsec_elapsed(&tv);
+	r_start = *reg;
+	elapsed = igt_nsec_elapsed(&tv) - t_start;
+
+	usleep(1000);
+
+	t_end = igt_nsec_elapsed(&tv);
+	r_end = *reg;
+	elapsed += igt_nsec_elapsed(&tv) - t_end;
+
+	elapsed = (t_end - t_start) + elapsed / 2;
+	return (r_end - r_start) * 1e9 / elapsed;
+}
+
 igt_main
 {
 	const struct intel_execution_engine *e;
@@ -640,6 +666,10 @@ igt_main
 			ring_size = 1024;
 
 		intel_register_access_init(intel_get_pci_device(), false, device);
+		rcs_clock = clockrate();
+		igt_info("RCS timestamp clock: %.3fKHz, %.1fns\n",
+			 rcs_clock / 1e3, 1e9 / rcs_clock);
+		rcs_clock = 1e9 / rcs_clock;
 	}
 
 	igt_subtest("all-rtidle-submit")
-- 
2.20.1