[Intel-gfx] [PATCH 4/9] drm/i915: Fix > vs >= mismatch in watermark/ddb calculations

[Matt Roper]

On Fri, Dec 21, 2018 at 07:14:31PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> Bspec says we have to reject the watermark if it's >= the ddb
> allocation. Fix the code to reject the == case as it should.
> For transition watermarks we can just use >=, for the rest
> we'll do +1 when calculating the minimum ddb allocation size.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 55a1c577f060..3c5cba31f055 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4371,8 +4371,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
>  				continue;
>  
>  			wm = &cstate->wm.skl.optimal.planes[plane_id];
> -			blocks += wm->wm[level].plane_res_b;
> -			blocks += wm->uv_wm[level].plane_res_b;
> +			blocks += wm->wm[level].plane_res_b + 1;
> +			blocks += wm->uv_wm[level].plane_res_b + 1;
>  		}
>  
>  		if (blocks < alloc_size) {
> @@ -4413,7 +4413,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
>  		extra = min_t(u16, alloc_size,
>  			      DIV64_U64_ROUND_UP(alloc_size * rate,
>  						 total_data_rate));
> -		total[plane_id] = wm->wm[level].plane_res_b + extra;
> +		total[plane_id] = wm->wm[level].plane_res_b + 1 + extra;
>  		alloc_size -= extra;
>  		total_data_rate -= rate;
>  
> @@ -4424,7 +4424,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
>  		extra = min_t(u16, alloc_size,
>  			      DIV64_U64_ROUND_UP(alloc_size * rate,
>  						 total_data_rate));
> -		uv_total[plane_id] = wm->uv_wm[level].plane_res_b + extra;
> +		uv_total[plane_id] = wm->uv_wm[level].plane_res_b + 1 + extra;
>  		alloc_size -= extra;
>  		total_data_rate -= rate;
>  	}
> @@ -4477,7 +4477,7 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
>  	 */
>  	for_each_plane_id_on_crtc(intel_crtc, plane_id) {
>  		wm = &cstate->wm.skl.optimal.planes[plane_id];
> -		if (wm->trans_wm.plane_res_b > total[plane_id])
> +		if (wm->trans_wm.plane_res_b >= total[plane_id])
>  			memset(&wm->trans_wm, 0, sizeof(wm->trans_wm));
>  	}
>  
> -- 
> 2.19.2
> 
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-- 
Matt Roper
Graphics Software Engineer
IoTG Platform Enabling & Development
Intel Corporation
(916) 356-2795