[Intel-gfx] [PATCH 1/2] drm/i915: Dump w/a lists on all engines

[Tvrtko Ursulin]

On 03/07/2019 14:58, Chris Wilson wrote:
> We store separate wa_list on every engine, so be sure to include all
> when dumping the current set via debugfs.
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> ---
>   drivers/gpu/drm/i915/i915_debugfs.c | 28 +++++++++++++++++++++-------
>   1 file changed, 21 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 6340cec733d2..fa8ff2704b6e 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2960,14 +2960,28 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused)
>   static int i915_wa_registers(struct seq_file *m, void *unused)
>   {
>   	struct drm_i915_private *i915 = node_to_i915(m->private);
> -	const struct i915_wa_list *wal = &i915->engine[RCS0]->ctx_wa_list;
> -	struct i915_wa *wa;
> -	unsigned int i;
> +	struct intel_engine_cs *engine;
> +	enum intel_engine_id id;
>   
> -	seq_printf(m, "Workarounds applied: %u\n", wal->count);
> -	for (i = 0, wa = wal->list; i < wal->count; i++, wa++)
> -		seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X\n",
> -			   i915_mmio_reg_offset(wa->reg), wa->val, wa->mask);
> +	for_each_engine(engine, i915, id) {
> +		const struct i915_wa_list *wal = &engine->ctx_wa_list;
> +		const struct i915_wa *wa;
> +		unsigned int count;
> +
> +		count = wal->count;
> +		if (!count)
> +			continue;
> +
> +		seq_printf(m, "%s: Workarounds applied: %u\n",
> +			   engine->name, count);

Complicating code to preserve line-by-line output in debugfs? :)

> +
> +		for (wa = wal->list; count--; wa++)
> +			seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X\n",
> +				   i915_mmio_reg_offset(wa->reg),
> +				   wa->val, wa->mask);
> +
> +		seq_printf(m, "\n");
> +	}
>   
>   	return 0;
>   }
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Regards,

Tvrtko