[Intel-gfx] [PATCH] drm/i915: Show support for accurate sw PMU busyness tracking
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Thu Jul 4 10:06:16 UTC 2019
On 03/07/2019 15:37, Chris Wilson wrote:
> Expose whether or not we support the PMU software tracking in our
> scheduler capabilities, so userspace can query at runtime.
>
> v2: Use I915_SCHEDULER_CAP_ENGINE_BUSY_STATS for a less ambiguous
> capability name.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> ---
> For reference, Tvrtko suggested an alternative back in Feb,
> "I am leaning towards thinking PMU is a backend and not the scheduler
> feature. We could export it via engine discovery for instance."
> -Chris
> ---
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 7 ++++---
> drivers/gpu/drm/i915/i915_pmu.c | 4 +---
> include/uapi/drm/i915_drm.h | 1 +
> 3 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> index c1fb5fa3952e..7d6d6e62e9cc 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
> @@ -688,9 +688,10 @@ void intel_engines_set_scheduler_caps(struct drm_i915_private *i915)
> u8 engine;
> u8 sched;
> } map[] = {
> -#define MAP(x, y) { ilog2(I915_ENGINE_HAS_##x), ilog2(I915_SCHEDULER_CAP_##y) }
> - MAP(PREEMPTION, PREEMPTION),
> - MAP(SEMAPHORES, SEMAPHORES),
> +#define MAP(x, y) { ilog2(I915_ENGINE_##x), ilog2(I915_SCHEDULER_CAP_##y) }
> + MAP(HAS_PREEMPTION, PREEMPTION),
> + MAP(HAS_SEMAPHORES, SEMAPHORES),
> + MAP(SUPPORTS_STATS, ENGINE_BUSY_STATS),
> #undef MAP
> };
> struct intel_engine_cs *engine;
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index 8fe46ee920a0..eff86483bec0 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -102,10 +102,8 @@ static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
> /*
> * Also there is software busyness tracking available we do not
> * need the timer for I915_SAMPLE_BUSY counter.
> - *
> - * Use RCS as proxy for all engines.
> */
> - else if (intel_engine_supports_stats(i915->engine[RCS0]))
> + else if (i915->caps.scheduler & I915_SCHEDULER_CAP_ENGINE_BUSY_STATS)
> enable &= ~BIT(I915_SAMPLE_BUSY);
>
> /*
> diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
> index 328d05e77d9f..469dc512cca3 100644
> --- a/include/uapi/drm/i915_drm.h
> +++ b/include/uapi/drm/i915_drm.h
> @@ -521,6 +521,7 @@ typedef struct drm_i915_irq_wait {
> #define I915_SCHEDULER_CAP_PRIORITY (1ul << 1)
> #define I915_SCHEDULER_CAP_PREEMPTION (1ul << 2)
> #define I915_SCHEDULER_CAP_SEMAPHORES (1ul << 3)
> +#define I915_SCHEDULER_CAP_ENGINE_BUSY_STATS (1ul << 4)
>
> #define I915_PARAM_HUC_STATUS 42
>
>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
Regards,
Tvrtko
More information about the Intel-gfx
mailing list