[Intel-gfx] [PATCH 05/28] drm/i915/tgl: Introduce Tiger Lake PCH
Gupta, Anshuman
anshuman.gupta at intel.com
Sun Jul 7 10:49:23 UTC 2019
Looks good to me, there in one minor comment.
On 6/25/2019 11:24 PM, Lucas De Marchi wrote:
> From: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
>
> Add the enum additions to TGP.
>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Cc: David Weinehall <david.weinehall at intel.com>
> Cc: James Ausmus <james.ausmus at intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 4 ++++
> drivers/gpu/drm/i915/i915_drv.h | 3 +++
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 96b7bbc58155..4c26c7f662ad 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -224,6 +224,10 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
> DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n");
> WARN_ON(!IS_ELKHARTLAKE(dev_priv));
> return PCH_MCC;
> + case INTEL_PCH_TGP_DEVICE_ID_TYPE:
> + DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n");
> + WARN_ON(!IS_TIGERLAKE(dev_priv));
> + return PCH_TGP;
> default:
> return PCH_NONE;
> }
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 8d0106b89f24..a77c63a0d48a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -536,6 +536,7 @@ enum intel_pch {
> PCH_CNP, /* Cannon/Comet Lake PCH */
> PCH_ICP, /* Ice Lake PCH */
> PCH_MCC, /* Mule Creek Canyon PCH */
> + PCH_TGP, /* Tiger Lake PCH */
> };
>
> #define QUIRK_LVDS_SSC_DISABLE (1<<1)
> @@ -2325,6 +2326,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define INTEL_PCH_ICP_DEVICE_ID_TYPE 0x3480
> #define INTEL_PCH_MCC_DEVICE_ID_TYPE 0x4B00
> #define INTEL_PCH_MCC2_DEVICE_ID_TYPE 0x3880
> +#define INTEL_PCH_TGP_DEVICE_ID_TYPE 0xA080
> #define INTEL_PCH_P2X_DEVICE_ID_TYPE 0x7100
> #define INTEL_PCH_P3X_DEVICE_ID_TYPE 0x7000
> #define INTEL_PCH_QEMU_DEVICE_ID_TYPE 0x2900 /* qemu q35 has 2918 */
> @@ -2332,6 +2334,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define INTEL_PCH_TYPE(dev_priv) ((dev_priv)->pch_type)
> #define INTEL_PCH_ID(dev_priv) ((dev_priv)->pch_id)
> #define HAS_PCH_MCC(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_MCC)
> +#define HAS_PCH_TGP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_TGP)This macro could be defined before HAS_PCH_MCC to follow the order in
which intel_pch enum are defined.
> #define HAS_PCH_ICP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_ICP)
> #define HAS_PCH_CNP(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_CNP)
> #define HAS_PCH_SPT(dev_priv) (INTEL_PCH_TYPE(dev_priv) == PCH_SPT)
>
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