[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915 vgpu PV to improve vgpu performance
Patchwork
patchwork at emeril.freedesktop.org
Mon Jul 8 01:48:59 UTC 2019
== Series Details ==
Series: i915 vgpu PV to improve vgpu performance
URL : https://patchwork.freedesktop.org/series/63333/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7dc9248b7979 drm/i915: introduced vgpu pv capability
-:91: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#91: FILE: drivers/gpu/drm/i915/i915_vgpu.c:105:
+ DRM_INFO("Virtual GPU for Intel GVT-g detected with pv_caps 0x%x.\n",
+ dev_priv->vgpu.pv_caps);
-:115: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#115: FILE: drivers/gpu/drm/i915/i915_vgpu.c:323:
+bool intel_vgpu_check_pv_caps(struct drm_i915_private *dev_priv,
+ void __iomem *shared_area)
-:153: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#153: FILE: drivers/gpu/drm/i915/i915_vgpu.h:57:
+bool intel_vgpu_check_pv_caps(struct drm_i915_private *dev_priv,
+ void __iomem *shared_area);
total: 0 errors, 0 warnings, 3 checks, 100 lines checked
35d4aff9c6de drm/i915: vgpu shared memory setup for pv optimization
-:101: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#101: FILE: drivers/gpu/drm/i915/i915_vgpu.c:320:
+static int intel_vgpu_setup_shared_page(struct drm_i915_private *dev_priv,
+ void __iomem *shared_area)
-:159: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*pv)...) over kzalloc(sizeof(struct i915_virtual_gpu_pv)...)
#159: FILE: drivers/gpu/drm/i915/i915_vgpu.c:378:
+ pv = kzalloc(sizeof(struct i915_virtual_gpu_pv), GFP_KERNEL);
total: 0 errors, 0 warnings, 2 checks, 158 lines checked
cc318f34fc2e drm/i915: vgpu pv command buffer support
-:51: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#51: FILE: drivers/gpu/drm/i915/i915_vgpu.c:333:
+static int wait_for_desc_update(struct vgpu_pv_ct_buffer_desc *desc,
+ u32 fence, u32 *status)
-:63: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#63: FILE: drivers/gpu/drm/i915/i915_vgpu.c:345:
+ DRM_ERROR("CT: fence %u failed; reported fence=%u\n",
+ fence, desc->fence);
-:88: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#88: FILE: drivers/gpu/drm/i915/i915_vgpu.c:370:
+static int pv_command_buffer_write(struct i915_virtual_gpu_pv *pv,
+ const u32 *action, u32 len /* in dwords */, u32 fence)
-:151: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#151: FILE: drivers/gpu/drm/i915/i915_vgpu.c:433:
+static int pv_send(struct drm_i915_private *dev_priv,
+ const u32 *action, u32 len, u32 *status)
-:186: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#186: FILE: drivers/gpu/drm/i915/i915_vgpu.c:468:
+static int intel_vgpu_pv_send_command_buffer(
-:203: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#203: FILE: drivers/gpu/drm/i915/i915_vgpu.c:485:
+ DRM_ERROR("PV: send action %#x returned %d (%#x)\n",
+ action[0], ret, ret);
-:226: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#226: FILE: drivers/gpu/drm/i915/i915_vgpu.c:573:
+ pv->ctb.desc->size = PAGE_SIZE/2;
^
-:245: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#245: FILE: drivers/gpu/drm/i915/i915_vgpu.h:32:
+#define PV_DESC_OFF (PAGE_SIZE/4)
^
-:246: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#246: FILE: drivers/gpu/drm/i915/i915_vgpu.h:33:
+#define PV_CMD_OFF (PAGE_SIZE/2)
^
-:323: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#323: FILE: drivers/gpu/drm/i915/i915_vgpu.h:130:
+intel_vgpu_pv_send(struct drm_i915_private *dev_priv,
+ u32 *action, u32 len)
total: 0 errors, 0 warnings, 10 checks, 299 lines checked
e882cebe14fe drm/i915: vgpu ppgtt update pv optimization
-:42: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the previous line
#42: FILE: drivers/gpu/drm/i915/i915_gem.c:1425:
+ if ((intel_vgpu_active(dev_priv) && !intel_vgpu_has_huge_gtt(dev_priv))
+ || intel_vgpu_enabled_pv_caps(dev_priv, PV_PPGTT_UPDATE))
-:56: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#56: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:914:
+void gen8_ppgtt_clear_4lvl(struct i915_address_space *vm,
u64 start, u64 length)
-:65: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#65: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1154:
+void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm,
struct i915_vma *vma,
-:74: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#74: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1470:
+int gen8_ppgtt_alloc_4lvl(struct i915_address_space *vm,
u64 start, u64 length)
-:96: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#96: FILE: drivers/gpu/drm/i915/i915_gem_gtt.h:645:
+void gen8_ppgtt_clear_4lvl(struct i915_address_space *vm,
+ u64 start, u64 length);
-:98: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#98: FILE: drivers/gpu/drm/i915/i915_gem_gtt.h:647:
+void gen8_ppgtt_insert_4lvl(struct i915_address_space *vm,
+ struct i915_vma *vma,
-:101: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#101: FILE: drivers/gpu/drm/i915/i915_gem_gtt.h:650:
+int gen8_ppgtt_alloc_4lvl(struct i915_address_space *vm,
+ u64 start, u64 length);
-:125: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#125: FILE: drivers/gpu/drm/i915/i915_vgpu.c:320:
+static int vgpu_ppgtt_pv_update(struct drm_i915_private *dev_priv,
+ u32 action, u64 pdp, u64 start, u64 length, u32 cache_level)
-:142: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#142: FILE: drivers/gpu/drm/i915/i915_vgpu.c:337:
+static void gen8_ppgtt_clear_4lvl_pv(struct i915_address_space *vm,
+ u64 start, u64 length)
-:149: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#149: FILE: drivers/gpu/drm/i915/i915_vgpu.c:344:
+ vgpu_ppgtt_pv_update(dev_priv, PV_ACTION_PPGTT_L4_CLEAR,
+ px_dma(ppgtt->pd), start, length, 0);
-:153: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#153: FILE: drivers/gpu/drm/i915/i915_vgpu.c:348:
+static void gen8_ppgtt_insert_4lvl_pv(struct i915_address_space *vm,
+ struct i915_vma *vma,
-:163: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#163: FILE: drivers/gpu/drm/i915/i915_vgpu.c:358:
+ vgpu_ppgtt_pv_update(dev_priv, PV_ACTION_PPGTT_L4_INSERT,
+ px_dma(ppgtt->pd), start, length, cache_level);
-:167: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#167: FILE: drivers/gpu/drm/i915/i915_vgpu.c:362:
+static int gen8_ppgtt_alloc_4lvl_pv(struct i915_address_space *vm,
+ u64 start, u64 length)
-:185: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#185: FILE: drivers/gpu/drm/i915/i915_vgpu.c:380:
+void intel_vgpu_config_pv_caps(struct drm_i915_private *dev_priv,
+ enum pv_caps cap, void *data)
-:235: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#235: FILE: drivers/gpu/drm/i915/i915_vgpu.h:139:
+intel_vgpu_enabled_pv_caps(struct drm_i915_private *dev_priv,
+ enum pv_caps cap)
-:238: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the previous line
#238: FILE: drivers/gpu/drm/i915/i915_vgpu.h:142:
+ return (dev_priv->vgpu.active) && intel_vgpu_has_pv_caps(dev_priv)
+ && (dev_priv->vgpu.pv_caps & cap);
-:249: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#249: FILE: drivers/gpu/drm/i915/i915_vgpu.h:165:
+void intel_vgpu_config_pv_caps(struct drm_i915_private *dev_priv,
+ enum pv_caps cap, void *data);
total: 0 errors, 0 warnings, 17 checks, 188 lines checked
f7ae004ae398 drm/i915: vgpu context submission pv optimization
-:130: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#130: FILE: drivers/gpu/drm/i915/i915_vgpu.h:33:
+#define PV_ELSP_OFF (PAGE_SIZE/8)
^
-:181: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#181:
new file mode 100644
-:201: CHECK:SPACING: spaces preferred around that '+' (ctx:VxV)
#201: FILE: drivers/gpu/drm/i915/intel_pv_submission.c:16:
+ reg_state[CTX_RING_TAIL+1] = intel_ring_set_tail(rq->ring, rq->tail);
^
-:212: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#212: FILE: drivers/gpu/drm/i915/intel_pv_submission.c:27:
+static void pv_submit(struct intel_engine_cs *engine,
+ struct i915_request **out,
-:313: CHECK:LINE_SPACING: Please don't use multiple blank lines
#313: FILE: drivers/gpu/drm/i915/intel_pv_submission.c:128:
+
+
total: 0 errors, 1 warnings, 4 checks, 307 lines checked
8e123919b35c drm/i915/gvt: GVTg handle pv_caps PVINFO register
01adbd98b998 drm/i915/gvt: GVTg handle shared_page setup
-:51: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#51: FILE: drivers/gpu/drm/i915/gvt/gvt.h:693:
+int intel_gvt_read_shared_page(struct intel_vgpu *vgpu,
+ unsigned int offset, void *buf, unsigned long len);
-:53: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#53: FILE: drivers/gpu/drm/i915/gvt/gvt.h:695:
+int intel_gvt_write_shared_page(struct intel_vgpu *vgpu,
+ unsigned int offset, void *buf, unsigned long len);
-:131: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#131: FILE: drivers/gpu/drm/i915/gvt/vgpu.c:603:
+int intel_gvt_read_shared_page(struct intel_vgpu *vgpu,
+ unsigned int offset, void *buf, unsigned long len)
-:150: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#150: FILE: drivers/gpu/drm/i915/gvt/vgpu.c:622:
+int intel_gvt_write_shared_page(struct intel_vgpu *vgpu,
+ unsigned int offset, void *buf, unsigned long len)
total: 0 errors, 0 warnings, 4 checks, 122 lines checked
d342082a121e drm/i915/gvt: GVTg support ppgtt pv optimization
-:83: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#83: FILE: drivers/gpu/drm/i915/gvt/gtt.c:1836:
+ gvt_vgpu_err("fail to create ppgtt for pdp 0x%llx\n",
+ px_dma(mm->ppgtt->pd));
-:119: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'end' - possible side-effects?
#119: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2874:
+#define pml4_addr_end(addr, end) \
+({ unsigned long __boundary = \
+ ((addr) + GEN8_PML4E_SIZE) & GEN8_PML4E_SIZE_MASK; \
+ (__boundary < (end)) ? __boundary : (end); \
+})
-:125: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'end' - possible side-effects?
#125: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2880:
+#define pdp_addr_end(addr, end) \
+({ unsigned long __boundary = \
+ ((addr) + GEN8_PDPE_SIZE) & GEN8_PDPE_SIZE_MASK; \
+ (__boundary < (end)) ? __boundary : (end); \
+})
-:131: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'end' - possible side-effects?
#131: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2886:
+#define pd_addr_end(addr, end) \
+({ unsigned long __boundary = \
+ ((addr) + GEN8_PDE_SIZE) & GEN8_PDE_SIZE_MASK; \
+ (__boundary < (end)) ? __boundary : (end); \
+})
-:144: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#144: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2899:
+static int walk_pt_range(struct intel_vgpu *vgpu, u64 pt,
+ u64 start, u64 end, struct ppgtt_walk *walk)
-:157: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#157: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2912:
+ ret = intel_gvt_hypervisor_read_gpa(vgpu,
+ (pt & PAGE_MASK) + (start_index << info->gtt_entry_size_shift),
-:178: CHECK:LINE_SPACING: Please don't use multiple blank lines
#178: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2933:
+
+
-:180: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#180: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2935:
+static int walk_pd_range(struct intel_vgpu *vgpu, u64 pd,
+ u64 start, u64 end, struct ppgtt_walk *walk)
-:192: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#192: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2947:
+ ret = intel_gvt_hypervisor_read_gpa(vgpu,
+ (pd & PAGE_MASK) + (index <<
-:205: CHECK:LINE_SPACING: Please don't use multiple blank lines
#205: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2960:
+
+
-:207: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#207: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2962:
+static int walk_pdp_range(struct intel_vgpu *vgpu, u64 pdp,
+ u64 start, u64 end, struct ppgtt_walk *walk)
-:219: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#219: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2974:
+ ret = intel_gvt_hypervisor_read_gpa(vgpu,
+ (pdp & PAGE_MASK) + (index <<
-:231: CHECK:LINE_SPACING: Please don't use multiple blank lines
#231: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2986:
+
+
-:233: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#233: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2988:
+static int walk_pml4_range(struct intel_vgpu *vgpu, u64 pml4,
+ u64 start, u64 end, struct ppgtt_walk *walk)
-:244: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#244: FILE: drivers/gpu/drm/i915/gvt/gtt.c:2999:
+ ret = intel_gvt_hypervisor_read_gpa(vgpu,
+ (pml4 & PAGE_MASK) + (index <<
-:257: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#257: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3012:
+static int intel_vgpu_pv_ppgtt_insert_4lvl(struct intel_vgpu *vgpu,
+ struct intel_vgpu_mm *mm,
-:275: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#275: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3030:
+ walk.mfns = kmalloc_array(num_pages,
+ sizeof(unsigned long), GFP_KERNEL);
-:320: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#320: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3075:
+int intel_vgpu_handle_pv_ppgtt_update(struct intel_vgpu *vgpu,
+ u32 action, struct pv_ppgtt_update *pv_ppgtt)
-:352: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#352: FILE: drivers/gpu/drm/i915/gvt/gtt.c:3107:
+ ret = intel_vgpu_pv_ppgtt_insert_4lvl(vgpu, mm,
+ pdp, start, length, cache_level);
-:391: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#391: FILE: drivers/gpu/drm/i915/gvt/gtt.h:290:
+int intel_vgpu_handle_pv_ppgtt_update(struct intel_vgpu *vgpu,
+ u32 action, struct pv_ppgtt_update *pv_ppgtt);
-:401: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'vgpu' - possible side-effects?
#401: FILE: drivers/gpu/drm/i915/gvt/gvt.h:56:
+#define VGPU_PVCAP(vgpu, cap) \
+ ((vgpu_vreg_t(vgpu, vgtif_reg(pv_caps)) & (cap)) \
+ && vgpu->shared_page_enabled)
-:403: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the previous line
#403: FILE: drivers/gpu/drm/i915/gvt/gvt.h:58:
+ ((vgpu_vreg_t(vgpu, vgtif_reg(pv_caps)) & (cap)) \
+ && vgpu->shared_page_enabled)
-:427: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#427: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1223:
+static int fetch_pv_command_buffer(struct intel_vgpu *vgpu,
+ struct vgpu_pv_ct_buffer_desc *desc,
-:448: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#448: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1244:
+ head = desc->head/4;
^
-:449: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#449: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1245:
+ tail = desc->tail/4;
^
-:450: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#450: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1246:
+ size = desc->size/4;
^
-:494: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#494: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1290:
+ ret = intel_gvt_read_shared_page(vgpu, off, &data[avail],
+ (len - avail) * 4);
-:533: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#533: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1329:
+ ret = intel_gvt_write_shared_page(vgpu, PV_DESC_OFF,
+ &desc, sizeof(desc));
total: 0 errors, 0 warnings, 28 checks, 518 lines checked
3d816a9bccbd drm/i915/gvt: GVTg support context submission pv optimization
-:71: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#71: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1826:
+ if (intel_gvt_read_shared_page(vgpu, desc_off,
+ &execlist->elsp_dwords.data, 16))
-:92: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#92: FILE: drivers/gpu/drm/i915/gvt/handlers.c:1850:
+ if (VGPU_PVCAP(vgpu, PV_SUBMISSION) &&
+ data == PV_ACTION_ELSP_SUBMISSION)
total: 0 errors, 0 warnings, 2 checks, 69 lines checked
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