[Intel-gfx] [PATCH 03/28] drm/i915: Add 4th pipe and transcoder

Ville Syrjälä ville.syrjala at linux.intel.com
Mon Jul 8 13:00:49 UTC 2019


On Tue, Jun 25, 2019 at 10:54:12AM -0700, Lucas De Marchi wrote:
> Add pipe D and transcoder D to prepare for platforms having them.
> 
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
>  drivers/gpu/drm/i915/display/intel_display.h | 4 ++++
>  drivers/gpu/drm/i915/i915_reg.h              | 3 +++
>  3 files changed, 9 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 6217b5bcea2a..9b13c62d3d53 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -17009,7 +17009,7 @@ struct intel_display_error_state {
>  		u32 vtotal;
>  		u32 vblank;
>  		u32 vsync;
> -	} transcoder[4];
> +	} transcoder[5];
>  };
>  
>  struct intel_display_error_state *
> @@ -17020,6 +17020,7 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv)
>  		TRANSCODER_A,
>  		TRANSCODER_B,
>  		TRANSCODER_C,
> +		TRANSCODER_D,
>  		TRANSCODER_EDP,
>  	};
>  	int i;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 12ded01ed5d3..dc9e4615246e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -58,6 +58,7 @@ enum pipe {
>  	PIPE_A = 0,
>  	PIPE_B,
>  	PIPE_C,
> +	PIPE_D,
>  	_PIPE_EDP,
>  
>  	I915_MAX_PIPES = _PIPE_EDP
> @@ -75,6 +76,7 @@ enum transcoder {
>  	TRANSCODER_A = PIPE_A,
>  	TRANSCODER_B = PIPE_B,
>  	TRANSCODER_C = PIPE_C,
> +	TRANSCODER_D = PIPE_D,
>  
>  	/*
>  	 * The following transcoders can map to any pipe, their enum value
> @@ -98,6 +100,8 @@ static inline const char *transcoder_name(enum transcoder transcoder)
>  		return "B";
>  	case TRANSCODER_C:
>  		return "C";
> +	case TRANSCODER_D:
> +		return "D";
>  	case TRANSCODER_EDP:
>  		return "EDP";
>  	case TRANSCODER_DSI_A:
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 8047f1bed314..a63a337eec2c 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4219,6 +4219,7 @@ enum {
>  #define TRANSCODER_B_OFFSET 0x61000
>  #define TRANSCODER_C_OFFSET 0x62000
>  #define CHV_TRANSCODER_C_OFFSET 0x63000
> +#define TRANSCODER_D_OFFSET 0x63000
>  #define TRANSCODER_EDP_OFFSET 0x6f000
>  #define TRANSCODER_DSI0_OFFSET	0x6b000
>  #define TRANSCODER_DSI1_OFFSET	0x6b800
> @@ -5765,6 +5766,7 @@ enum {
>  #define PIPE_A_OFFSET		0x70000
>  #define PIPE_B_OFFSET		0x71000
>  #define PIPE_C_OFFSET		0x72000
> +#define PIPE_D_OFFSET		0x73000
>  #define CHV_PIPE_C_OFFSET	0x74000
>  /*
>   * There's actually no pipe EDP. Some pipe registers have
> @@ -9331,6 +9333,7 @@ enum skl_power_gate {
>  #define _TRANS_DDI_FUNC_CTL_A		0x60400
>  #define _TRANS_DDI_FUNC_CTL_B		0x61400
>  #define _TRANS_DDI_FUNC_CTL_C		0x62400
> +#define _TRANS_DDI_FUNC_CTL_D		0x63400
>  #define _TRANS_DDI_FUNC_CTL_EDP		0x6F400
>  #define _TRANS_DDI_FUNC_CTL_DSI0	0x6b400
>  #define _TRANS_DDI_FUNC_CTL_DSI1	0x6bc00
> -- 
> 2.21.0
> 
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-- 
Ville Syrjälä
Intel


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