[Intel-gfx] [PATCH v2 22/25] drm/i915/gen12: MBUS B credit change

[Ville Syrjälä]

On Mon, Jul 08, 2019 at 04:16:26PM -0700, Lucas De Marchi wrote:
> From: Rodrigo Vivi <rodrigo.vivi at intel.com>
> 
> Previously, the recommended B credit for all platforms was 24 / number
> of pipes, which would give 6 for newer platforms with 4 pipes. However 6
> is not enough and we need 12 on these cases.
> 
> We also need a different BW credit for these platforms.
> 
> Cc: Arthur J Runyan <arthur.j.runyan at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++++--
>  1 file changed, 8 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 9ccf58ff4dba..9a5d04a2ab3e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6423,8 +6423,14 @@ static void icl_pipe_mbus_enable(struct intel_crtc *crtc)
>  	u32 val;
>  
>  	val = MBUS_DBOX_A_CREDIT(2);
> -	val |= MBUS_DBOX_BW_CREDIT(1);
> -	val |= MBUS_DBOX_B_CREDIT(8);
> +
> +	if (INTEL_GEN(dev_priv) >= 12) {
> +		val |= MBUS_DBOX_BW_CREDIT(2);
> +		val |= MBUS_DBOX_B_CREDIT(12);
> +	} else {
> +		val |= MBUS_DBOX_BW_CREDIT(1);
> +		val |= MBUS_DBOX_B_CREDIT(8);
> +	}
>  
>  	I915_WRITE(PIPE_MBUS_DBOX_CTL(pipe), val);
>  }
> -- 
> 2.21.0

-- 
Ville Syrjälä
Intel