[Intel-gfx] ✓ Fi.CI.BAT: success for Initial support for Tiger Lake (rev3)
Patchwork
patchwork at emeril.freedesktop.org
Tue Jul 9 18:46:30 UTC 2019
== Series Details ==
Series: Initial support for Tiger Lake (rev3)
URL : https://patchwork.freedesktop.org/series/62726/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6444 -> Patchwork_13588
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13588/
Known issues
------------
Here are the changes found in Patchwork_13588 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt at i915_selftest@live_sanitycheck:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6444/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13588/fi-icl-u3/igt@i915_selftest@live_sanitycheck.html
#### Possible fixes ####
* {igt at gem_ctx_switch@legacy-render}:
- fi-icl-guc: [INCOMPLETE][3] ([fdo#107713]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6444/fi-icl-guc/igt@gem_ctx_switch@legacy-render.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13588/fi-icl-guc/igt@gem_ctx_switch@legacy-render.html
* igt at gem_mmap_gtt@basic-read-no-prefault:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6444/fi-icl-u3/igt@gem_mmap_gtt@basic-read-no-prefault.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13588/fi-icl-u3/igt@gem_mmap_gtt@basic-read-no-prefault.html
* igt at kms_frontbuffer_tracking@basic:
- fi-icl-u2: [FAIL][7] ([fdo#103167]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6444/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13588/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
Participating hosts (53 -> 46)
------------------------------
Missing (7): fi-kbl-soraka fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-icl-y fi-icl-dsi fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_6444 -> Patchwork_13588
CI_DRM_6444: 6e842ef98f5278c942ddd9bbe83b19697deef7b0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5092: 2a66ae6626d5583240509f84117d1345a799b75a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13588: 281d1bcfc2261eb88918b65d844d7bb9f638ab9a @ git://anongit.freedesktop.org/gfx-ci/linux
== Kernel 32bit build ==
Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13588/build_32bit.log
CALL scripts/checksyscalls.sh
CALL scripts/atomic/check-atomics.sh
CHK include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready (#1)
Building modules, stage 2.
MODPOST 112 modules
ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERROR: "__divdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:91: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1287: recipe for target 'modules' failed
make: *** [modules] Error 2
== Linux commits ==
281d1bcfc226 drm/i915/tgl: Update DPLL clock reference register
cf688295aed2 drm/i915/tgl: Add DPLL registers
a840d06f8c92 drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization
cd3414367161 drm/i915/gen12: MBUS B credit change
9bb0ad3b4017 drm/i915/tgl: apply Display WA #1178 to fix type C dongles
414c3ae9ddfd drm/i915/tgl: Add vbt value mapping for DDC Bus pin
33cbf7793050 drm/i915/tgl: init ddi port A-C for Tiger Lake
17b3e3c96fb6 drm/i915/tgl: extend intel_port_is_combophy/tc
e7d46091155c drm/i915/tgl: select correct bit for port select
93b16ee61a60 drm/i915/tgl: port to ddc pin mapping
5ff6a19fe86f drm/i915/tgl: Add gmbus gpio pin to port mapping
7787733b30b1 drm/i915/tgl: update ddi/tc clock_off bits
5e768170eebe drm/i915/tgl: Add additional ports for Tiger Lake
91b16ba0eb18 drm/i915/tgl: Add pll manager
45b62a9eac96 drm/i915/tgl: Add new pll ids
f5175d7ae1c3 drm/i915/tgl: Add power well to support 4th pipe
228a055462e0 drm/i915/tgl: Add power well support
52cd60dca858 drm/i915/tgl: use TRANSCODER_EDP_VDSC on transcoder A
7ad31e8ccdb5 drm/i915/tgl: Check if pipe D is fused
8e56a0e4bf92 x86/gpu: add TGL stolen memory support
9b52a5d4d480 drm/i915/tgl: Add TGL PCI IDs
cb543d474e7a drm/i915/tgl: Add TGL PCH detection in virtualized environment
777a2d8d8266 drm/i915/tgl: Introduce Tiger Lake PCH
0cd4b6f0f2d1 drm/i915/tgl: add initial Tiger Lake definitions
5c5e5e6008d1 drm/i915: Add 4th pipe and transcoder
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13588/
More information about the Intel-gfx
mailing list