[Intel-gfx] [PATCH v2 14/25] drm/i915/tgl: update ddi/tc clock_off bits

Souza, Jose jose.souza at intel.com
Tue Jul 9 19:49:21 UTC 2019


FYI

https://patchwork.freedesktop.org/patch/316805/?series=62492&rev=7

Is just waiting CI feedback to get merged and it is doing the same job
as this patch.

On Mon, 2019-07-08 at 16:16 -0700, Lucas De Marchi wrote:
> From: Mahesh Kumar <mahesh1.kumar at intel.com>
> 
> In GEN 12 PORT_C DDI clk_off bit is not equally distanced to A/B,
> it's at offset 24. Similarly TC port (5/6) clk off bits are at
> offset 22/23. Extend the macros to cover the additional ports.
> 
> Signed-off-by: Mahesh Kumar <mahesh1.kumar at intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index 5ca74eca05a4..4588df9e11de 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9723,9 +9723,11 @@ enum skl_power_gate {
>  #define DPCLKA_CFGCR0_ICL			_MMIO(0x164280)
>  #define  DPCLKA_CFGCR0_DDI_CLK_OFF(port)	(1 << ((port)
> ==  PORT_F ? 23 : \
>  						      (port) + 10))
> -#define  ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(port)   (1 << ((port) + 10))
> -#define  ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port) (1 << ((tc_port) ==
> PORT_TC4 ? \
> -						      21 : (tc_port) +
> 12))
> +#define  ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(port)	(1 << ((port) == PORT_C
> ? 24 : \
> +						       (port) + 10))
> +#define  ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port)	(1 <<
> ((tc_port) < PORT_TC4 ? \
> +						       (tc_port) + 12 :
> \
> +						       (tc_port) -
> PORT_TC4 + 21))
>  #define  DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(port)	((port) ==
> PORT_F ? 21 : \
>  						(port) * 2)
>  #define  DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(port)	(3 <<
> DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(port))


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