[Intel-gfx] [PATCH 04/11] drm/i915/gtt: Markup i915_ppgtt depth

[Mika Kuoppala]

Chris Wilson <chris at chris-wilson.co.uk> writes:

> Quoting Mika Kuoppala (2019-07-10 09:17:27)
>> Chris Wilson <chris at chris-wilson.co.uk> writes:
>> 
>> > This will be useful to consolidate recursive code.
>> >
>> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
>> > ---
>> >  drivers/gpu/drm/i915/i915_gem_gtt.c | 3 +++
>> >  drivers/gpu/drm/i915/i915_gem_gtt.h | 1 +
>> >  2 files changed, 4 insertions(+)
>> >
>> > diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> > index da4db76ce054..2fc60e8acd9a 100644
>> > --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
>> > +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> > @@ -1537,6 +1537,8 @@ static void ppgtt_init(struct i915_ppgtt *ppgtt, struct intel_gt *gt)
>> >       ppgtt->vm.vma_ops.unbind_vma  = ppgtt_unbind_vma;
>> >       ppgtt->vm.vma_ops.set_pages   = ppgtt_set_pages;
>> >       ppgtt->vm.vma_ops.clear_pages = clear_pages;
>> > +
>> > +     ppgtt->vm.top = i915_vm_is_4lvl(&ppgtt->vm) ? 3 : 2;
>> 
>> Perhaps it becomes evident later in the series why top and
>> not level, so these would be 4 and 3 here.
>
> Because we use top and not level :)

You make me substract one with my biological processor.
It is hard.

Please do remake the i915_vm_is_4lvl() and include.
-Mika