[Intel-gfx] [PATCH 09/12] drm/i915/uc: Move intel functions to intel_uc
Michal Wajdeczko
michal.wajdeczko at intel.com
Wed Jul 10 18:26:33 UTC 2019
On Wed, 10 Jul 2019 02:54:34 +0200, Daniele Ceraolo Spurio
<daniele.ceraolospurio at intel.com> wrote:
> All the intel_uc_* can now be moved to work on the intel_uc structure
> for better encapsulation of uc-related actions.
>
> Note: I've introduced uc_to_gt instead of uc_to_i915 because the aim is
> to move everything to be gt-focused in the medium term, so we would've
> had to replace it soon anyway.
>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_pm.c | 6 +-
> drivers/gpu/drm/i915/gt/intel_gt.h | 5 +
> drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
> drivers/gpu/drm/i915/gt/uc/intel_uc.c | 184 ++++++++++++-------------
> drivers/gpu/drm/i915/gt/uc/intel_uc.h | 34 ++---
> drivers/gpu/drm/i915/i915_drv.c | 14 +-
> drivers/gpu/drm/i915/i915_drv.h | 6 +-
> drivers/gpu/drm/i915/i915_gem.c | 18 +--
> 8 files changed, 137 insertions(+), 132 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> index 4d774376f5b8..3c674c952a78 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> @@ -173,7 +173,7 @@ void i915_gem_suspend(struct drm_i915_private *i915)
> i915_gem_drain_freed_objects(i915);
> - intel_uc_suspend(i915);
> + intel_uc_suspend(&i915->gt.uc);
> }
> static struct drm_i915_gem_object *first_mm_object(struct list_head
> *list)
> @@ -238,7 +238,7 @@ void i915_gem_suspend_late(struct drm_i915_private
> *i915)
> }
> spin_unlock_irqrestore(&i915->mm.obj_lock, flags);
> - intel_uc_sanitize(i915);
> + intel_uc_sanitize(&i915->gt.uc);
> i915_gem_sanitize(i915);
> }
> @@ -265,7 +265,7 @@ void i915_gem_resume(struct drm_i915_private *i915)
> if (intel_gt_resume(&i915->gt))
> goto err_wedged;
> - intel_uc_resume(i915);
> + intel_uc_resume(&i915->gt.uc);
> /* Always reload a context for powersaving. */
> if (!i915_gem_load_power_context(i915))
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h
> b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 1093dcf36f63..880be05a3f4a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -11,6 +11,11 @@
> struct drm_i915_private;
> +static inline struct intel_gt *uc_to_gt(struct intel_uc *uc)
> +{
> + return container_of(uc, struct intel_gt, uc);
> +}
> +
> void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private
> *i915);
> void intel_gt_init_hw(struct drm_i915_private *i915);
> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
> b/drivers/gpu/drm/i915/gt/intel_reset.c
> index ccedea636ba3..be23f4557111 100644
> --- a/drivers/gpu/drm/i915/gt/intel_reset.c
> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c
> @@ -720,7 +720,7 @@ static intel_engine_mask_t reset_prepare(struct
> drm_i915_private *i915)
> reset_prepare_engine(engine);
> }
> - intel_uc_reset_prepare(i915);
> + intel_uc_reset_prepare(&i915->gt.uc);
> return awake;
> }
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> index e2080da2e1e4..2062e7ff05e8 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c
> @@ -22,19 +22,22 @@
> *
> */
> +#include "gt/intel_gt.h"
> #include "gt/intel_reset.h"
> -#include "intel_uc.h"
> #include "intel_guc.h"
we don't need this, it's included by "intel_uc.h"
> #include "intel_guc_ads.h"
> #include "intel_guc_submission.h"
> +#include "intel_uc.h"
> +
> #include "i915_drv.h"
> static void guc_free_load_err_log(struct intel_guc *guc);
> /* Reset GuC providing us with fresh state for both GuC and HuC.
> */
> -static int __intel_uc_reset_hw(struct drm_i915_private *dev_priv)
> +static int __intel_uc_reset_hw(struct intel_uc *uc)
> {
> + struct drm_i915_private *dev_priv = uc_to_gt(uc)->i915;
> int ret;
> u32 guc_status;
> @@ -52,10 +55,10 @@ static int __intel_uc_reset_hw(struct
> drm_i915_private *dev_priv)
> return ret;
> }
> -static int __get_platform_enable_guc(struct drm_i915_private *i915)
> +static int __get_platform_enable_guc(struct intel_uc *uc)
> {
> - struct intel_uc_fw *guc_fw = &i915->gt.uc.guc.fw;
> - struct intel_uc_fw *huc_fw = &i915->gt.uc.huc.fw;
> + struct intel_uc_fw *guc_fw = &uc->guc.fw;
> + struct intel_uc_fw *huc_fw = &uc->huc.fw;
> int enable_guc = 0;
> /* Default is to use HuC if we know GuC and HuC firmwares */
> @@ -67,12 +70,11 @@ static int __get_platform_enable_guc(struct
> drm_i915_private *i915)
> return enable_guc;
> }
> -static int __get_default_guc_log_level(struct drm_i915_private *i915)
> +static int __get_default_guc_log_level(struct intel_uc *uc)
> {
> int guc_log_level;
> - if (!intel_uc_fw_supported(&i915->gt.uc.guc.fw) ||
> - !intel_uc_is_using_guc(i915))
> + if (!intel_uc_fw_supported(&uc->guc.fw) || !intel_uc_is_using_guc(uc))
> guc_log_level = GUC_LOG_LEVEL_DISABLED;
> else if (IS_ENABLED(CONFIG_DRM_I915_DEBUG) ||
> IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
> @@ -87,7 +89,7 @@ static int __get_default_guc_log_level(struct
> drm_i915_private *i915)
> /**
> * sanitize_options_early - sanitize uC related modparam options
> - * @i915: device private
> + * @uc: the intel_uc structure
> *
> * In case of "enable_guc" option this function will attempt to modify
> * it only if it was initially set to "auto(-1)". Default value for this
> @@ -102,22 +104,22 @@ static int __get_default_guc_log_level(struct
> drm_i915_private *i915)
> * unless GuC is enabled on given platform and the driver is compiled
> with
> * debug config when this modparam will default to "enable(1..4)".
> */
> -static void sanitize_options_early(struct drm_i915_private *i915)
> +static void sanitize_options_early(struct intel_uc *uc)
> {
> - struct intel_uc_fw *guc_fw = &i915->gt.uc.guc.fw;
> - struct intel_uc_fw *huc_fw = &i915->gt.uc.huc.fw;
> + struct intel_uc_fw *guc_fw = &uc->guc.fw;
> + struct intel_uc_fw *huc_fw = &uc->huc.fw;
> /* A negative value means "use platform default" */
> if (i915_modparams.enable_guc < 0)
> - i915_modparams.enable_guc = __get_platform_enable_guc(i915);
> + i915_modparams.enable_guc = __get_platform_enable_guc(uc);
> DRM_DEBUG_DRIVER("enable_guc=%d (submission:%s huc:%s)\n",
> i915_modparams.enable_guc,
> - yesno(intel_uc_is_using_guc_submission(i915)),
> - yesno(intel_uc_is_using_huc(i915)));
> + yesno(intel_uc_is_using_guc_submission(uc)),
> + yesno(intel_uc_is_using_huc(uc)));
> /* Verify GuC firmware availability */
> - if (intel_uc_is_using_guc(i915) && !intel_uc_fw_is_selected(guc_fw)) {
> + if (intel_uc_is_using_guc(uc) && !intel_uc_fw_is_selected(guc_fw)) {
> DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
> "enable_guc", i915_modparams.enable_guc,
> !intel_uc_fw_supported(guc_fw) ?
> @@ -125,7 +127,7 @@ static void sanitize_options_early(struct
> drm_i915_private *i915)
> }
> /* Verify HuC firmware availability */
> - if (intel_uc_is_using_huc(i915) && !intel_uc_fw_is_selected(huc_fw)) {
> + if (intel_uc_is_using_huc(uc) && !intel_uc_fw_is_selected(huc_fw)) {
> DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
> "enable_guc", i915_modparams.enable_guc,
> !intel_uc_fw_supported(huc_fw) ?
> @@ -133,7 +135,7 @@ static void sanitize_options_early(struct
> drm_i915_private *i915)
> }
> /* XXX: GuC submission is unavailable for now */
> - if (intel_uc_is_using_guc_submission(i915)) {
> + if (intel_uc_is_using_guc_submission(uc)) {
> DRM_INFO("Incompatible option detected: %s=%d, %s!\n",
> "enable_guc", i915_modparams.enable_guc,
> "GuC submission not supported");
> @@ -144,9 +146,9 @@ static void sanitize_options_early(struct
> drm_i915_private *i915)
> /* A negative value means "use platform/config default" */
> if (i915_modparams.guc_log_level < 0)
> i915_modparams.guc_log_level =
> - __get_default_guc_log_level(i915);
> + __get_default_guc_log_level(uc);
> - if (i915_modparams.guc_log_level > 0 && !intel_uc_is_using_guc(i915)) {
> + if (i915_modparams.guc_log_level > 0 && !intel_uc_is_using_guc(uc)) {
> DRM_WARN("Incompatible option detected: %s=%d, %s!\n",
> "guc_log_level", i915_modparams.guc_log_level,
> !intel_uc_fw_supported(guc_fw) ?
> @@ -172,34 +174,29 @@ static void sanitize_options_early(struct
> drm_i915_private *i915)
> GEM_BUG_ON(i915_modparams.guc_log_level < 0);
> }
> -void intel_uc_init_early(struct drm_i915_private *i915)
> +void intel_uc_init_early(struct intel_uc *uc)
> {
> - struct intel_guc *guc = &i915->gt.uc.guc;
> - struct intel_huc *huc = &i915->gt.uc.huc;
> + intel_guc_init_early(&uc->guc);
> + intel_huc_init_early(&uc->huc);
> - intel_guc_init_early(guc);
> - intel_huc_init_early(huc);
> -
> - sanitize_options_early(i915);
> + sanitize_options_early(uc);
> }
> -void intel_uc_cleanup_early(struct drm_i915_private *i915)
> +void intel_uc_cleanup_early(struct intel_uc *uc)
> {
> - struct intel_guc *guc = &i915->gt.uc.guc;
> -
> - guc_free_load_err_log(guc);
> + guc_free_load_err_log(&uc->guc);
> }
> /**
> * intel_uc_init_mmio - setup uC MMIO access
> - * @i915: device private
> + * @uc: the intel_uc structure
> *
> * Setup minimal state necessary for MMIO accesses later in the
> * initialization sequence.
> */
> -void intel_uc_init_mmio(struct drm_i915_private *i915)
> +void intel_uc_init_mmio(struct intel_uc *uc)
> {
> - intel_guc_init_send_regs(&i915->gt.uc.guc);
> + intel_guc_init_send_regs(&uc->guc);
> }
> static void guc_capture_load_err_log(struct intel_guc *guc)
> @@ -346,54 +343,56 @@ static void guc_disable_communication(struct
> intel_guc *guc)
> DRM_INFO("GuC communication disabled\n");
> }
> -void intel_uc_fetch_firmwares(struct drm_i915_private *i915)
> +void intel_uc_fetch_firmwares(struct intel_uc *uc)
> {
> - if (!USES_GUC(i915))
> + struct drm_i915_private *i915 = uc_to_gt(uc)->i915;
> +
> + if (!intel_uc_is_using_guc(uc))
> return;
> - intel_uc_fw_fetch(i915, &i915->gt.uc.guc.fw);
> + intel_uc_fw_fetch(i915, &uc->guc.fw);
> - if (USES_HUC(i915))
> - intel_uc_fw_fetch(i915, &i915->gt.uc.huc.fw);
> + if (intel_uc_is_using_huc(uc))
> + intel_uc_fw_fetch(i915, &uc->huc.fw);
> }
> -void intel_uc_cleanup_firmwares(struct drm_i915_private *i915)
> +void intel_uc_cleanup_firmwares(struct intel_uc *uc)
> {
> - if (!USES_GUC(i915))
> + if (!intel_uc_is_using_guc(uc))
> return;
> - if (USES_HUC(i915))
> - intel_uc_fw_cleanup_fetch(&i915->gt.uc.huc.fw);
> + if (intel_uc_is_using_huc(uc))
> + intel_uc_fw_cleanup_fetch(&uc->huc.fw);
> - intel_uc_fw_cleanup_fetch(&i915->gt.uc.guc.fw);
> + intel_uc_fw_cleanup_fetch(&uc->guc.fw);
> }
> -int intel_uc_init(struct drm_i915_private *i915)
> +int intel_uc_init(struct intel_uc *uc)
> {
> - struct intel_guc *guc = &i915->gt.uc.guc;
> - struct intel_huc *huc = &i915->gt.uc.huc;
> + struct intel_guc *guc = &uc->guc;
> + struct intel_huc *huc = &uc->huc;
> int ret;
> - if (!USES_GUC(i915))
> + if (!intel_uc_is_using_guc(uc))
> return 0;
> if (!intel_uc_fw_supported(&guc->fw))
> return -ENODEV;
> /* XXX: GuC submission is unavailable for now */
> - GEM_BUG_ON(USES_GUC_SUBMISSION(i915));
> + GEM_BUG_ON(intel_uc_is_using_guc_submission(uc));
> ret = intel_guc_init(guc);
> if (ret)
> return ret;
> - if (USES_HUC(i915)) {
> + if (intel_uc_is_using_huc(uc)) {
> ret = intel_huc_init(huc);
> if (ret)
> goto err_guc;
> }
> - if (USES_GUC_SUBMISSION(i915)) {
> + if (intel_uc_is_using_guc_submission(uc)) {
> /*
> * This is stuff we need to have available at fw load time
> * if we are planning to enable submission later
> @@ -406,59 +405,60 @@ int intel_uc_init(struct drm_i915_private *i915)
> return 0;
> err_huc:
> - if (USES_HUC(i915))
> + if (intel_uc_is_using_huc(uc))
> intel_huc_fini(huc);
> err_guc:
> intel_guc_fini(guc);
> return ret;
> }
> -void intel_uc_fini(struct drm_i915_private *i915)
> +void intel_uc_fini(struct intel_uc *uc)
> {
> - struct intel_guc *guc = &i915->gt.uc.guc;
> + struct intel_guc *guc = &uc->guc;
> - if (!USES_GUC(i915))
> + if (!intel_uc_is_using_guc(uc))
> return;
> GEM_BUG_ON(!intel_uc_fw_supported(&guc->fw));
> - if (USES_GUC_SUBMISSION(i915))
> + if (intel_uc_is_using_guc_submission(uc))
> intel_guc_submission_fini(guc);
> - if (USES_HUC(i915))
> - intel_huc_fini(&i915->gt.uc.huc);
> + if (intel_uc_is_using_huc(uc))
> + intel_huc_fini(&uc->huc);
> intel_guc_fini(guc);
> }
> -static void __uc_sanitize(struct drm_i915_private *i915)
> +static void __uc_sanitize(struct intel_uc *uc)
> {
> - struct intel_guc *guc = &i915->gt.uc.guc;
> - struct intel_huc *huc = &i915->gt.uc.huc;
> + struct intel_guc *guc = &uc->guc;
> + struct intel_huc *huc = &uc->huc;
> GEM_BUG_ON(!intel_uc_fw_supported(&guc->fw));
> intel_huc_sanitize(huc);
> intel_guc_sanitize(guc);
> - __intel_uc_reset_hw(i915);
> + __intel_uc_reset_hw(uc);
> }
> -void intel_uc_sanitize(struct drm_i915_private *i915)
> +void intel_uc_sanitize(struct intel_uc *uc)
> {
> - if (!USES_GUC(i915))
> + if (!intel_uc_is_using_guc(uc))
> return;
> - __uc_sanitize(i915);
> + __uc_sanitize(uc);
> }
> -int intel_uc_init_hw(struct drm_i915_private *i915)
> +int intel_uc_init_hw(struct intel_uc *uc)
> {
> - struct intel_guc *guc = &i915->gt.uc.guc;
> - struct intel_huc *huc = &i915->gt.uc.huc;
> + struct drm_i915_private *i915 = uc_to_gt(uc)->i915;
> + struct intel_guc *guc = &uc->guc;
> + struct intel_huc *huc = &uc->huc;
> int ret, attempts;
> - if (!USES_GUC(i915))
> + if (!intel_uc_is_using_guc(uc))
> return 0;
> GEM_BUG_ON(!intel_uc_fw_supported(&guc->fw));
> @@ -477,11 +477,11 @@ int intel_uc_init_hw(struct drm_i915_private *i915)
> * Always reset the GuC just before (re)loading, so
> * that the state and timing are fairly predictable
> */
> - ret = __intel_uc_reset_hw(i915);
> + ret = __intel_uc_reset_hw(uc);
> if (ret)
> goto err_out;
> - if (USES_HUC(i915)) {
> + if (intel_uc_is_using_huc(uc)) {
> ret = intel_huc_fw_upload(huc);
> if (ret)
> goto err_out;
> @@ -505,7 +505,7 @@ int intel_uc_init_hw(struct drm_i915_private *i915)
> if (ret)
> goto err_log_capture;
> - if (USES_HUC(i915)) {
> + if (intel_uc_is_using_huc(uc)) {
> ret = intel_huc_auth(huc);
> if (ret)
> goto err_communication;
> @@ -515,7 +515,7 @@ int intel_uc_init_hw(struct drm_i915_private *i915)
> if (ret)
> goto err_communication;
> - if (USES_GUC_SUBMISSION(i915)) {
> + if (intel_uc_is_using_guc_submission(uc)) {
> ret = intel_guc_submission_enable(guc);
> if (ret)
> goto err_communication;
> @@ -524,9 +524,9 @@ int intel_uc_init_hw(struct drm_i915_private *i915)
> dev_info(i915->drm.dev, "GuC firmware version %u.%u\n",
> guc->fw.major_ver_found, guc->fw.minor_ver_found);
> dev_info(i915->drm.dev, "GuC submission %s\n",
> - enableddisabled(USES_GUC_SUBMISSION(i915)));
> + enableddisabled(intel_uc_is_using_guc_submission(uc)));
> dev_info(i915->drm.dev, "HuC %s\n",
> - enableddisabled(USES_HUC(i915)));
> + enableddisabled(intel_uc_is_using_huc(uc)));
> return 0;
> @@ -538,7 +538,7 @@ int intel_uc_init_hw(struct drm_i915_private *i915)
> err_log_capture:
> guc_capture_load_err_log(guc);
> err_out:
> - __uc_sanitize(i915);
> + __uc_sanitize(uc);
> /*
> * Note that there is no fallback as either user explicitly asked for
> @@ -551,42 +551,42 @@ int intel_uc_init_hw(struct drm_i915_private *i915)
> return ret;
> }
> -void intel_uc_fini_hw(struct drm_i915_private *i915)
> +void intel_uc_fini_hw(struct intel_uc *uc)
> {
> - struct intel_guc *guc = &i915->gt.uc.guc;
> + struct intel_guc *guc = &uc->guc;
> if (!intel_guc_is_loaded(guc))
> return;
> GEM_BUG_ON(!intel_uc_fw_supported(&guc->fw));
> - if (USES_GUC_SUBMISSION(i915))
> + if (intel_uc_is_using_guc_submission(uc))
> intel_guc_submission_disable(guc);
> guc_disable_communication(guc);
> - __uc_sanitize(i915);
> + __uc_sanitize(uc);
> }
> /**
> * intel_uc_reset_prepare - Prepare for reset
> - * @i915: device private
> + * @uc: the intel_uc structure
> *
> * Preparing for full gpu reset.
> */
> -void intel_uc_reset_prepare(struct drm_i915_private *i915)
> +void intel_uc_reset_prepare(struct intel_uc *uc)
> {
> - struct intel_guc *guc = &i915->gt.uc.guc;
> + struct intel_guc *guc = &uc->guc;
> if (!intel_guc_is_loaded(guc))
> return;
> guc_stop_communication(guc);
> - __uc_sanitize(i915);
> + __uc_sanitize(uc);
> }
> -void intel_uc_runtime_suspend(struct drm_i915_private *i915)
> +void intel_uc_runtime_suspend(struct intel_uc *uc)
> {
> - struct intel_guc *guc = &i915->gt.uc.guc;
> + struct intel_guc *guc = &uc->guc;
> int err;
> if (!intel_guc_is_loaded(guc))
> @@ -599,21 +599,21 @@ void intel_uc_runtime_suspend(struct
> drm_i915_private *i915)
> guc_disable_communication(guc);
> }
> -void intel_uc_suspend(struct drm_i915_private *i915)
> +void intel_uc_suspend(struct intel_uc *uc)
> {
> - struct intel_guc *guc = &i915->gt.uc.guc;
> + struct intel_guc *guc = &uc->guc;
> intel_wakeref_t wakeref;
> if (!intel_guc_is_loaded(guc))
> return;
> - with_intel_runtime_pm(&i915->runtime_pm, wakeref)
> - intel_uc_runtime_suspend(i915);
> + with_intel_runtime_pm(&uc_to_gt(uc)->i915->runtime_pm, wakeref)
> + intel_uc_runtime_suspend(uc);
> }
> -int intel_uc_resume(struct drm_i915_private *i915)
> +int intel_uc_resume(struct intel_uc *uc)
> {
> - struct intel_guc *guc = &i915->gt.uc.guc;
> + struct intel_guc *guc = &uc->guc;
> int err;
> if (!intel_guc_is_loaded(guc))
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.h
> b/drivers/gpu/drm/i915/gt/uc/intel_uc.h
> index a2fdc84afff2..fe3362fd7706 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.h
> @@ -33,34 +33,34 @@ struct intel_uc {
> struct intel_huc huc;
> };
> -void intel_uc_init_early(struct drm_i915_private *dev_priv);
> -void intel_uc_cleanup_early(struct drm_i915_private *dev_priv);
> -void intel_uc_init_mmio(struct drm_i915_private *dev_priv);
> -void intel_uc_fetch_firmwares(struct drm_i915_private *dev_priv);
> -void intel_uc_cleanup_firmwares(struct drm_i915_private *dev_priv);
> -void intel_uc_sanitize(struct drm_i915_private *dev_priv);
> -int intel_uc_init_hw(struct drm_i915_private *dev_priv);
> -void intel_uc_fini_hw(struct drm_i915_private *dev_priv);
> -int intel_uc_init(struct drm_i915_private *dev_priv);
> -void intel_uc_fini(struct drm_i915_private *dev_priv);
> -void intel_uc_reset_prepare(struct drm_i915_private *i915);
> -void intel_uc_suspend(struct drm_i915_private *i915);
> -void intel_uc_runtime_suspend(struct drm_i915_private *i915);
> -int intel_uc_resume(struct drm_i915_private *dev_priv);
> +void intel_uc_init_early(struct intel_uc *uc);
> +void intel_uc_cleanup_early(struct intel_uc *uc);
> +void intel_uc_init_mmio(struct intel_uc *uc);
> +void intel_uc_fetch_firmwares(struct intel_uc *uc);
> +void intel_uc_cleanup_firmwares(struct intel_uc *uc);
> +void intel_uc_sanitize(struct intel_uc *uc);
> +int intel_uc_init_hw(struct intel_uc *uc);
> +void intel_uc_fini_hw(struct intel_uc *uc);
> +int intel_uc_init(struct intel_uc *uc);
> +void intel_uc_fini(struct intel_uc *uc);
> +void intel_uc_reset_prepare(struct intel_uc *uc);
> +void intel_uc_suspend(struct intel_uc *uc);
> +void intel_uc_runtime_suspend(struct intel_uc *uc);
> +int intel_uc_resume(struct intel_uc *uc);
> -static inline bool intel_uc_is_using_guc(struct drm_i915_private *i915)
> +static inline bool intel_uc_is_using_guc(struct intel_uc *uc)
> {
> GEM_BUG_ON(i915_modparams.enable_guc < 0);
> return i915_modparams.enable_guc > 0;
> }
> -static inline bool intel_uc_is_using_guc_submission(struct
> drm_i915_private *i915)
> +static inline bool intel_uc_is_using_guc_submission(struct intel_uc *uc)
> {
> GEM_BUG_ON(i915_modparams.enable_guc < 0);
> return i915_modparams.enable_guc & ENABLE_GUC_SUBMISSION;
> }
> -static inline bool intel_uc_is_using_huc(struct drm_i915_private *i915)
> +static inline bool intel_uc_is_using_huc(struct intel_uc *uc)
> {
> GEM_BUG_ON(i915_modparams.enable_guc < 0);
> return i915_modparams.enable_guc & ENABLE_GUC_LOAD_HUC;
> diff --git a/drivers/gpu/drm/i915/i915_drv.c
> b/drivers/gpu/drm/i915/i915_drv.c
> index e7c89d320375..f594e74f097d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -934,7 +934,7 @@ static int i915_driver_init_early(struct
> drm_i915_private *dev_priv)
> intel_detect_pch(dev_priv);
> intel_wopcm_init_early(&dev_priv->wopcm);
> - intel_uc_init_early(dev_priv);
> + intel_uc_init_early(&dev_priv->gt.uc);
> intel_pm_setup(dev_priv);
> intel_init_dpio(dev_priv);
> ret = intel_power_domains_init(dev_priv);
> @@ -952,7 +952,7 @@ static int i915_driver_init_early(struct
> drm_i915_private *dev_priv)
> return 0;
> err_uc:
> - intel_uc_cleanup_early(dev_priv);
> + intel_uc_cleanup_early(&dev_priv->gt.uc);
> i915_gem_cleanup_early(dev_priv);
> err_workqueues:
> i915_workqueues_cleanup(dev_priv);
> @@ -969,7 +969,7 @@ static void i915_driver_cleanup_early(struct
> drm_i915_private *dev_priv)
> {
> intel_irq_fini(dev_priv);
> intel_power_domains_cleanup(dev_priv);
> - intel_uc_cleanup_early(dev_priv);
> + intel_uc_cleanup_early(&dev_priv->gt.uc);
> i915_gem_cleanup_early(dev_priv);
> i915_workqueues_cleanup(dev_priv);
> i915_engines_cleanup(dev_priv);
> @@ -1008,7 +1008,7 @@ static int i915_driver_init_mmio(struct
> drm_i915_private *dev_priv)
> intel_uncore_prune_mmio_domains(&dev_priv->uncore);
> - intel_uc_init_mmio(dev_priv);
> + intel_uc_init_mmio(&dev_priv->gt.uc);
> ret = intel_engines_init_mmio(dev_priv);
> if (ret)
> @@ -2933,7 +2933,7 @@ static int intel_runtime_suspend(struct device
> *kdev)
> */
> i915_gem_runtime_suspend(dev_priv);
> - intel_uc_runtime_suspend(dev_priv);
> + intel_uc_runtime_suspend(&dev_priv->gt.uc);
> intel_runtime_pm_disable_interrupts(dev_priv);
> @@ -2958,7 +2958,7 @@ static int intel_runtime_suspend(struct device
> *kdev)
> intel_runtime_pm_enable_interrupts(dev_priv);
> - intel_uc_resume(dev_priv);
> + intel_uc_resume(&dev_priv->gt.uc);
> intel_gt_init_swizzling(&dev_priv->gt);
> i915_gem_restore_fences(dev_priv);
> @@ -3056,7 +3056,7 @@ static int intel_runtime_resume(struct device
> *kdev)
> intel_runtime_pm_enable_interrupts(dev_priv);
> - intel_uc_resume(dev_priv);
> + intel_uc_resume(&dev_priv->gt.uc);
> /*
> * No point of rolling back things in case of an error, as the best
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index c4757cbf9a33..99004c8b833f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2293,9 +2293,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define HAS_HUC_UCODE(dev_priv) (HAS_GUC(dev_priv))
> /* Having a GuC is not the same as using a GuC */
> -#define USES_GUC(dev_priv) intel_uc_is_using_guc(dev_priv)
> -#define
> USES_GUC_SUBMISSION(dev_priv) intel_uc_is_using_guc_submission(dev_priv)
> -#define USES_HUC(dev_priv) intel_uc_is_using_huc(dev_priv)
> +#define USES_GUC(dev_priv) intel_uc_is_using_guc(&(dev_priv)->gt.uc)
> +#define
> USES_GUC_SUBMISSION(dev_priv) intel_uc_is_using_guc_submission(&(dev_priv)->gt.uc)
> +#define USES_HUC(dev_priv) intel_uc_is_using_huc(&(dev_priv)->gt.uc)
> #define HAS_POOLED_EU(dev_priv) (INTEL_INFO(dev_priv)->has_pooled_eu)
> diff --git a/drivers/gpu/drm/i915/i915_gem.c
> b/drivers/gpu/drm/i915/i915_gem.c
> index e6e8e4d5ebb1..b792e85b8c2b 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1248,7 +1248,7 @@ int i915_gem_init_hw(struct drm_i915_private *i915)
> }
> /* We can't enable contexts until all firmware is loaded */
> - ret = intel_uc_init_hw(i915);
> + ret = intel_uc_init_hw(&i915->gt.uc);
> if (ret) {
> DRM_ERROR("Enabling uc failed (%d)\n", ret);
> goto out;
> @@ -1433,7 +1433,7 @@ int i915_gem_init(struct drm_i915_private
> *dev_priv)
> if (ret)
> return ret;
> - intel_uc_fetch_firmwares(dev_priv);
> + intel_uc_fetch_firmwares(&dev_priv->gt.uc);
> ret = intel_wopcm_init(&dev_priv->wopcm);
> if (ret)
> @@ -1481,7 +1481,7 @@ int i915_gem_init(struct drm_i915_private
> *dev_priv)
> intel_init_gt_powersave(dev_priv);
> - ret = intel_uc_init(dev_priv);
> + ret = intel_uc_init(&dev_priv->gt.uc);
> if (ret)
> goto err_pm;
> @@ -1545,9 +1545,9 @@ int i915_gem_init(struct drm_i915_private
> *dev_priv)
> mutex_lock(&dev_priv->drm.struct_mutex);
> err_init_hw:
> - intel_uc_fini_hw(dev_priv);
> + intel_uc_fini_hw(&dev_priv->gt.uc);
> err_uc_init:
> - intel_uc_fini(dev_priv);
> + intel_uc_fini(&dev_priv->gt.uc);
> err_pm:
> if (ret != -EIO) {
> intel_cleanup_gt_powersave(dev_priv);
> @@ -1564,7 +1564,7 @@ int i915_gem_init(struct drm_i915_private
> *dev_priv)
> mutex_unlock(&dev_priv->drm.struct_mutex);
> err_uc_fw:
> - intel_uc_cleanup_firmwares(dev_priv);
> + intel_uc_cleanup_firmwares(&dev_priv->gt.uc);
> if (ret != -EIO) {
> i915_gem_cleanup_userptr(dev_priv);
> @@ -1611,8 +1611,8 @@ void i915_gem_fini_hw(struct drm_i915_private
> *dev_priv)
> i915_gem_drain_workqueue(dev_priv);
> mutex_lock(&dev_priv->drm.struct_mutex);
> - intel_uc_fini_hw(dev_priv);
> - intel_uc_fini(dev_priv);
> + intel_uc_fini_hw(&dev_priv->gt.uc);
> + intel_uc_fini(&dev_priv->gt.uc);
> mutex_unlock(&dev_priv->drm.struct_mutex);
> i915_gem_drain_freed_objects(dev_priv);
> @@ -1630,7 +1630,7 @@ void i915_gem_fini(struct drm_i915_private
> *dev_priv)
> intel_cleanup_gt_powersave(dev_priv);
> - intel_uc_cleanup_firmwares(dev_priv);
> + intel_uc_cleanup_firmwares(&dev_priv->gt.uc);
> i915_gem_cleanup_userptr(dev_priv);
> intel_timelines_fini(dev_priv);
>
patch will likely be further simplified after applying nits to 8/12,
but in the meantime
Acked-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
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