[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Initial support for Tiger Lake (rev6)

[Patchwork]

== Series Details ==

Series: Initial support for Tiger Lake (rev6)
URL   : https://patchwork.freedesktop.org/series/62726/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
84393d3db7c9 drm/i915: Add 4th pipe and transcoder
a755f8c87f85 drm/i915/tgl: add initial Tiger Lake definitions
ffc0dcf5fb65 drm/i915/tgl: Introduce Tiger Lake PCH
c9e8ac767299 drm/i915/tgl: Add TGL PCH detection in virtualized environment
9dee5c2b7821 drm/i915/tgl: Add TGL PCI IDs
-:34: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#34: FILE: include/drm/i915_pciids.h:587:
+#define INTEL_TGL_12_IDS(info) \
+	INTEL_VGA_DEVICE(0x9A49, info), \
+	INTEL_VGA_DEVICE(0x9A40, info), \
+	INTEL_VGA_DEVICE(0x9A59, info), \
+	INTEL_VGA_DEVICE(0x9A60, info), \
+	INTEL_VGA_DEVICE(0x9A68, info), \
+	INTEL_VGA_DEVICE(0x9A70, info), \
+	INTEL_VGA_DEVICE(0x9A78, info)

-:34: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'info' - possible side-effects?
#34: FILE: include/drm/i915_pciids.h:587:
+#define INTEL_TGL_12_IDS(info) \
+	INTEL_VGA_DEVICE(0x9A49, info), \
+	INTEL_VGA_DEVICE(0x9A40, info), \
+	INTEL_VGA_DEVICE(0x9A59, info), \
+	INTEL_VGA_DEVICE(0x9A60, info), \
+	INTEL_VGA_DEVICE(0x9A68, info), \
+	INTEL_VGA_DEVICE(0x9A70, info), \
+	INTEL_VGA_DEVICE(0x9A78, info)

total: 1 errors, 0 warnings, 1 checks, 21 lines checked
f4bc08927341 x86/gpu: add TGL stolen memory support
83c4d1f873b5 drm/i915/tgl: Check if pipe D is fused
2ed955964046 drm/i915/tgl: rename TRANSCODER_EDP_VDSC to use on transcoder A
7da85cb1428c drm/i915/tgl: Add power well support
5389b91d4818 drm/i915/tgl: Add power well to support 4th pipe
823df8840f44 drm/i915/tgl: Add new pll ids
7c59befa3c4c drm/i915/tgl: Add pll manager
3302928f181c drm/i915/tgl: Add additional ports for Tiger Lake
3c4b2d16195c drm/i915/tgl: update ddi/tc clock_off bits
-:24: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'port' - possible side-effects?
#24: FILE: drivers/gpu/drm/i915/i915_reg.h:9726:
+#define  ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(port)	(1 << ((port) == PORT_C ? 24 : \
+						       (port) + 10))

-:26: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'tc_port' - possible side-effects?
#26: FILE: drivers/gpu/drm/i915/i915_reg.h:9728:
+#define  ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port)	(1 << ((tc_port) < PORT_TC4 ? \
+						       (tc_port) + 12 : \
+						       (tc_port) - PORT_TC4 + 21))

total: 0 errors, 0 warnings, 2 checks, 14 lines checked
92d6c3891dab drm/i915/tgl: Add gmbus gpio pin to port mapping
2a57fe2608ac drm/i915/tgl: port to ddc pin mapping
3d15834d9ff4 drm/i915/tgl: select correct bit for port select
9781f9a6a87e drm/i915/tgl: extend intel_port_is_combophy/tc
96761325338d drm/i915/tgl: init ddi port A-C for Tiger Lake
998ef7f0436d drm/i915/tgl: Add vbt value mapping for DDC Bus pin
d7de35fc7516 drm/i915/tgl: apply Display WA #1178 to fix type C dongles
f4a17f51c2f6 drm/i915/gen12: MBUS B credit change
605688040111 drm/i915/tgl: skip setting PORT_CL_DW12_* on initialization
4398be057620 drm/i915/tgl: Add DPLL registers
37e84ddbab72 drm/i915/tgl: Update DPLL clock reference register