[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/21] drm/i915: Add 4th pipe and transcoder

[Patchwork]

== Series Details ==

Series: series starting with [CI,01/21] drm/i915: Add 4th pipe and transcoder
URL   : https://patchwork.freedesktop.org/series/63528/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
8c5d9599c135 drm/i915: Add 4th pipe and transcoder
e6e0cc3b8702 drm/i915/tgl: add initial Tiger Lake definitions
837c6de93950 drm/i915/tgl: Introduce Tiger Lake PCH
2803998164ad drm/i915/tgl: Add TGL PCH detection in virtualized environment
883553983e46 drm/i915/tgl: Add TGL PCI IDs
-:35: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#35: FILE: include/drm/i915_pciids.h:587:
+#define INTEL_TGL_12_IDS(info) \
+	INTEL_VGA_DEVICE(0x9A49, info), \
+	INTEL_VGA_DEVICE(0x9A40, info), \
+	INTEL_VGA_DEVICE(0x9A59, info), \
+	INTEL_VGA_DEVICE(0x9A60, info), \
+	INTEL_VGA_DEVICE(0x9A68, info), \
+	INTEL_VGA_DEVICE(0x9A70, info), \
+	INTEL_VGA_DEVICE(0x9A78, info)

-:35: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'info' - possible side-effects?
#35: FILE: include/drm/i915_pciids.h:587:
+#define INTEL_TGL_12_IDS(info) \
+	INTEL_VGA_DEVICE(0x9A49, info), \
+	INTEL_VGA_DEVICE(0x9A40, info), \
+	INTEL_VGA_DEVICE(0x9A59, info), \
+	INTEL_VGA_DEVICE(0x9A60, info), \
+	INTEL_VGA_DEVICE(0x9A68, info), \
+	INTEL_VGA_DEVICE(0x9A70, info), \
+	INTEL_VGA_DEVICE(0x9A78, info)

total: 1 errors, 0 warnings, 1 checks, 21 lines checked
510219026ae8 drm/i915/tgl: Check if pipe D is fused
63934798206f drm/i915/tgl: rename TRANSCODER_EDP_VDSC to use on transcoder A
67a742c4d319 drm/i915/tgl: Add power well support
a1a70f0c18c7 drm/i915/tgl: Add power well to support 4th pipe
1e13db2a45fa drm/i915/tgl: Add new pll ids
72bfafdc522e drm/i915/tgl: Add pll manager
029aa51a25e8 drm/i915/tgl: Add additional ports for Tiger Lake
0361ee034f15 drm/i915/tgl: extend intel_port_is_combophy/tc
7db88e58cf14 drm/i915/tgl: init ddi port A-C for Tiger Lake
f0209d1b63ef drm/i915/tgl: apply Display WA #1178 to fix type C dongles
78d49928e5c7 drm/i915/gen12: MBUS B credit change
9d4f02efaaa7 drm/i915/tgl: Add gmbus gpio pin to port mapping
288bdf24ccf4 drm/i915/tgl: port to ddc pin mapping
e18185cf695d drm/i915/tgl: Add vbt value mapping for DDC Bus pin
d0629a9c04d0 drm/i915/tgl: Add DPLL registers
2a9ee472c270 drm/i915/tgl: Update DPLL clock reference register