[Intel-gfx] [PATCH v3 1/2] drm/i915/display/icl: Bump up the vdisplay to reflect higher transcoder vertical limits

[Manasi Navare]

On Thu, Jul 11, 2019 at 01:38:41PM +0300, Ville Syrjälä wrote:
> On Wed, Jul 10, 2019 at 02:39:50PM -0700, Manasi Navare wrote:
> > On ICL+, the vertical limits for the transcoders are increased to 8192 so bump up
> > limits in intel_mode_valid()
> > 
> > v3:
> > * Supported starting ICL (Ville)
> > * Use the higher limits from TRANS_VTOTAL register (Ville)
> > v2:
> > * Checkpatch warning (Manasi)
> > 
> > Cc: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> > Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > Signed-off-by: Manasi Navare <manasi.d.navare at intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c | 9 +++++++--
> >  1 file changed, 7 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index f07081815b80..9883f607bb88 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -15764,8 +15764,13 @@ intel_mode_valid(struct drm_device *dev,
> >  			   DRM_MODE_FLAG_CLKDIV2))
> >  		return MODE_BAD;
> >  
> > -	if (INTEL_GEN(dev_priv) >= 9 ||
> > -	    IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
> > +	if (INTEL_GEN(dev_priv) >= 11) {
> > +		hdisplay_max = 8192;
> > +		vdisplay_max = 8192;
> 
> The horiz limits should be 16k.

So the TRANS_HTOTAL has had 14 bits so allowed 16K even for Gen9+, should
this be changed for all?

Manasi

> 
> > +		htotal_max = 8192;
> > +		vtotal_max = 8192;
> > +	} else if (INTEL_GEN(dev_priv) >= 9 ||
> > +		   IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
> >  		hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */
> >  		vdisplay_max = 4096;
> >  		htotal_max = 8192;
> > -- 
> > 2.19.1
> 
> -- 
> Ville Syrjälä
> Intel