[Intel-gfx] [PATCH v2 2/3] drm/i915: Implement read-only support in whitelist selftest

[John Harrison]

On 7/12/2019 01:53, Tvrtko Ursulin wrote:
> On 12/07/2019 08:07, John.C.Harrison at Intel.com wrote:
>> From: John Harrison <John.C.Harrison at Intel.com>
>>
>> Newer hardware supports extra feature in the whitelist registers. This
>> patch updates the selftest to test that entries marked as read only
>> are actually read only.
>>
>> v2: Removed all use of 'rsvd' for read-only registers to avoid
>> ambiguous code or error messages.
> Work's never done. :) You can follow up with a patch which adds engine looping to live_reset_whitelist.

There is _always_ something more to be done!

I noticed that Lionel added usage of the RANGE field too. There needs to 
be looping support added for that. At the moment, the self-test simply 
masks off the range bits and ignores them. It really should be updated 
to test the entire range.

Lionel, any chance you would have time to pick up these extra changes?

Thanks,
John.

>
> I was looking at your test results and wondering why no new whitelists:
>
> <6> [486.665700] i915: Running intel_workarounds_live_selftests/live_reset_whitelist
> <6> [486.665706] Checking 4 whitelisted registers on rcs0 (RING_NONPRIV) [engine]
> <7> [486.666281] [drm:intel_power_well_enable [i915]] enabling always-on
> <5> [486.668777] i915 0000:00:02.0: Resetting rcs0 for live_workarounds
> <6> [486.669900] Checking 4 whitelisted registers on rcs0 (RING_NONPRIV) [device]
> <5> [486.671042] i915 0000:00:02.0: Resetting chip for live_workarounds
>
> Regards,
>
> Tvrtko
>