[Intel-gfx] [PATCH] drm/dp/dsc: Add Support for all BPCs supported by TGL

[Manasi Navare]

On Mon, Jul 15, 2019 at 04:40:56PM -0700, Anusha Srivatsa wrote:
> DSC engine on ICL supports only 8 and 10 BPC as the input
> BPC. But DSC engine in TGL supports 8, 10 and 12 BPC.
> Add 12 BPC support for DSC while calculating compression
> configuration.
> 
> v2: Remove the separate define TGL_DP_DSC_MAX_SUPPORTED_BPC
> and use the value directly.(More such defines can be removed
> as part of future patches). (Ville)

IMO what Ville asked to do in his comment was to remove all the #defines
for the max DSC BPC so remove the ones for 8 and 10 also to mak eit more readable
and that user does not have to hunt for the #defines for either of these.

> 
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare at intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0eb5d66f87a7..aa8bfb754fc1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1914,8 +1914,12 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
>  	if (!intel_dp_supports_dsc(intel_dp, pipe_config))
>  		return -EINVAL;
>  
> -	dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC,
> -			    conn_state->max_requested_bpc);
> +	/* Max DSC Input BPC for TGL+ is 12 */
> +	if (INTEL_GEN(dev_priv) >= 12)
> +		dsc_max_bpc = min_t(u8, 12, conn_state->max_requested_bpc);
> +	else
> +		dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC,
> +				    conn_state->max_requested_bpc);

Use 10 here directly

>  
>  	pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, dsc_max_bpc);
>  	if (pipe_bpp < DP_DSC_MIN_SUPPORTED_BPC * 3) {

Use 8 here directly

Manasi
> -- 
> 2.21.0
>