[Intel-gfx] [PATCH 03/22] drm/i915/tgl: update ddi/tc clock_off bits

[Srivatsa, Anusha]

>-----Original Message-----
>From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On Behalf Of
>Lucas De Marchi
>Sent: Friday, July 12, 2019 6:09 PM
>To: intel-gfx at lists.freedesktop.org
>Cc: Mahesh Kumar <mahesh1.kumar at intel.com>
>Subject: [Intel-gfx] [PATCH 03/22] drm/i915/tgl: update ddi/tc clock_off bits
>
>From: Mahesh Kumar <mahesh1.kumar at intel.com>
>
>In GEN 12 PORT_C DDI clk_off bit is not equally distanced to A/B, it's at offset 24.
>Similarly TC port (5/6) clk off bits are at offset 22/23. Extend the macros to cover
>the additional ports.
>
>Cc: Matt Roper <matthew.d.roper at intel.com>
>Signed-off-by: Mahesh Kumar <mahesh1.kumar at intel.com>
>Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>

Checked with spec, looks good.

Reviewed-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
>---
> drivers/gpu/drm/i915/i915_reg.h | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index def71fd2e4d1..d873d9fbbf0e 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -9749,8 +9749,9 @@ enum skl_power_gate {
>
> #define ICL_DPCLKA_CFGCR0			_MMIO(0x164280)
> #define  ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy)	(1 << _PICK(phy, 10, 11,
>24))
>-#define  ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port) (1 << ((tc_port) ==
>PORT_TC4 ? \
>-						      21 : (tc_port) + 12))
>+#define  ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port)	(1 << ((tc_port) <
>PORT_TC4 ? \
>+						       (tc_port) + 12 : \
>+						       (tc_port) - PORT_TC4 + 21))
> #define  ICL_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(phy)	((phy) * 2)
> #define  ICL_DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(phy)	(3 <<
>ICL_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(phy))
> #define  ICL_DPCLKA_CFGCR0_DDI_CLK_SEL(pll, phy)	((pll) <<
>ICL_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(phy))
>--
>2.21.0
>
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