[Intel-gfx] [PATCH 05/22] drm/i915/tgl: Update north display hotplug detection to TGL connections
Srivatsa, Anusha
anusha.srivatsa at intel.com
Tue Jul 16 23:09:25 UTC 2019
>-----Original Message-----
>From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On Behalf Of
>Lucas De Marchi
>Sent: Friday, July 12, 2019 6:09 PM
>To: intel-gfx at lists.freedesktop.org
>Subject: [Intel-gfx] [PATCH 05/22] drm/i915/tgl: Update north display hotplug
>detection to TGL connections
>
>From: José Roberto de Souza <jose.souza at intel.com>
>
>TGL has 3 combophys and 6 TC/TBT ports, so it has 2 more TC/TBT ports than ICL
>and the PORT_C on TGL is a combophy.
>So here adding a new hpd north table and function to detect long pulse for TGL.
>
>Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
>Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
>---
> drivers/gpu/drm/i915/i915_irq.c | 51 +++++++++++++++++++++++++++++----
>drivers/gpu/drm/i915/i915_reg.h | 12 ++++++--
> 2 files changed, 56 insertions(+), 7 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>index a7a90674db89..256bd2c072c1 100644
>--- a/drivers/gpu/drm/i915/i915_irq.c
>+++ b/drivers/gpu/drm/i915/i915_irq.c
>@@ -56,6 +56,8 @@
> * and related files, but that will be described in separate chapters.
> */
>
>+typedef bool (*long_pulse_detect_func)(enum hpd_pin pin, u32 val);
>+
> static const u32 hpd_ilk[HPD_NUM_PINS] = {
> [HPD_PORT_A] = DE_DP_A_HOTPLUG,
> };
>@@ -133,6 +135,15 @@ static const u32 hpd_gen11[HPD_NUM_PINS] = {
> [HPD_PORT_F] = GEN11_TC4_HOTPLUG | GEN11_TBT4_HOTPLUG };
>
>+static const u32 hpd_gen12[HPD_NUM_PINS] = {
>+ [HPD_PORT_D] = GEN11_TC1_HOTPLUG | GEN11_TBT1_HOTPLUG,
>+ [HPD_PORT_E] = GEN11_TC2_HOTPLUG | GEN11_TBT2_HOTPLUG,
>+ [HPD_PORT_F] = GEN11_TC3_HOTPLUG | GEN11_TBT3_HOTPLUG,
>+ [HPD_PORT_G] = GEN11_TC4_HOTPLUG | GEN11_TBT4_HOTPLUG,
>+ [HPD_PORT_H] = GEN12_TC5_HOTPLUG | GEN12_TBT5_HOTPLUG,
>+ [HPD_PORT_I] = GEN12_TC6_HOTPLUG | GEN12_TBT6_HOTPLUG };
>+
> static const u32 hpd_icp[HPD_NUM_PINS] = {
> [HPD_PORT_A] = SDE_DDIA_HOTPLUG_ICP,
> [HPD_PORT_B] = SDE_DDIB_HOTPLUG_ICP,
>@@ -1676,6 +1687,26 @@ static bool gen11_port_hotplug_long_detect(enum
>hpd_pin pin, u32 val)
> }
> }
>
>+static bool gen12_port_hotplug_long_detect(enum hpd_pin pin, u32 val) {
>+ switch (pin) {
>+ case HPD_PORT_D:
>+ return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC1);
>+ case HPD_PORT_E:
>+ return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC2);
>+ case HPD_PORT_F:
>+ return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC3);
>+ case HPD_PORT_G:
>+ return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC4);
>+ case HPD_PORT_H:
>+ return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC5);
>+ case HPD_PORT_I:
>+ return val & GEN11_HOTPLUG_CTL_LONG_DETECT(PORT_TC6);
>+ default:
>+ return false;
>+ }
>+}
>+
> static bool bxt_port_hotplug_long_detect(enum hpd_pin pin, u32 val) {
> switch (pin) {
>@@ -2869,6 +2900,16 @@ static void gen11_hpd_irq_handler(struct
>drm_i915_private *dev_priv, u32 iir)
> u32 pin_mask = 0, long_mask = 0;
> u32 trigger_tc = iir & GEN11_DE_TC_HOTPLUG_MASK;
> u32 trigger_tbt = iir & GEN11_DE_TBT_HOTPLUG_MASK;
>+ long_pulse_detect_func long_pulse_detect;
>+ const u32 *hpd;
>+
>+ if (INTEL_GEN(dev_priv) >= 12) {
>+ long_pulse_detect = gen12_port_hotplug_long_detect;
>+ hpd = hpd_gen12;
>+ } else {
>+ long_pulse_detect = gen11_port_hotplug_long_detect;
>+ hpd = hpd_gen11;
>+ }
>
> if (trigger_tc) {
> u32 dig_hotplug_reg;
>@@ -2877,8 +2918,7 @@ static void gen11_hpd_irq_handler(struct
>drm_i915_private *dev_priv, u32 iir)
> I915_WRITE(GEN11_TC_HOTPLUG_CTL, dig_hotplug_reg);
>
> intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
>trigger_tc,
>- dig_hotplug_reg, hpd_gen11,
>- gen11_port_hotplug_long_detect);
>+ dig_hotplug_reg, hpd, long_pulse_detect);
> }
>
> if (trigger_tbt) {
>@@ -2888,8 +2928,7 @@ static void gen11_hpd_irq_handler(struct
>drm_i915_private *dev_priv, u32 iir)
> I915_WRITE(GEN11_TBT_HOTPLUG_CTL, dig_hotplug_reg);
>
> intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
>trigger_tbt,
>- dig_hotplug_reg, hpd_gen11,
>- gen11_port_hotplug_long_detect);
>+ dig_hotplug_reg, hpd, long_pulse_detect);
> }
>
> if (pin_mask)
>@@ -3915,9 +3954,11 @@ static void gen11_hpd_detection_setup(struct
>drm_i915_private *dev_priv) static void gen11_hpd_irq_setup(struct
>drm_i915_private *dev_priv) {
> u32 hotplug_irqs, enabled_irqs;
>+ const u32 *hpd;
> u32 val;
>
>- enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd_gen11);
>+ hpd = INTEL_GEN(dev_priv) >= 12 ? hpd_gen12 : hpd_gen11;
>+ enabled_irqs = intel_hpd_enabled_irqs(dev_priv, hpd);
> hotplug_irqs = GEN11_DE_TC_HOTPLUG_MASK |
>GEN11_DE_TBT_HOTPLUG_MASK;
>
> val = I915_READ(GEN11_DE_HPD_IMR);
>diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
>index fbc5146a5931..ff703baf105f 100644
>--- a/drivers/gpu/drm/i915/i915_reg.h
>+++ b/drivers/gpu/drm/i915/i915_reg.h
>@@ -7471,21 +7471,29 @@ enum {
> #define GEN11_DE_HPD_IMR _MMIO(0x44474)
> #define GEN11_DE_HPD_IIR _MMIO(0x44478)
> #define GEN11_DE_HPD_IER _MMIO(0x4447c)
>+#define GEN12_TC6_HOTPLUG (1 << 21)
>+#define GEN12_TC5_HOTPLUG (1 << 20)
> #define GEN11_TC4_HOTPLUG (1 << 19)
> #define GEN11_TC3_HOTPLUG (1 << 18)
> #define GEN11_TC2_HOTPLUG (1 << 17)
> #define GEN11_TC1_HOTPLUG (1 << 16)
> #define GEN11_TC_HOTPLUG(tc_port) (1 << ((tc_port) + 16))
>-#define GEN11_DE_TC_HOTPLUG_MASK (GEN11_TC4_HOTPLUG
>| \
>+#define GEN11_DE_TC_HOTPLUG_MASK (GEN12_TC6_HOTPLUG
>| \
>+ GEN12_TC5_HOTPLUG | \
>+ GEN11_TC4_HOTPLUG | \
> GEN11_TC3_HOTPLUG | \
> GEN11_TC2_HOTPLUG | \
> GEN11_TC1_HOTPLUG)
>+#define GEN12_TBT6_HOTPLUG (1 << 5)
>+#define GEN12_TBT5_HOTPLUG (1 << 4)
> #define GEN11_TBT4_HOTPLUG (1 << 3)
> #define GEN11_TBT3_HOTPLUG (1 << 2)
> #define GEN11_TBT2_HOTPLUG (1 << 1)
> #define GEN11_TBT1_HOTPLUG (1 << 0)
> #define GEN11_TBT_HOTPLUG(tc_port) (1 << (tc_port))
>-#define GEN11_DE_TBT_HOTPLUG_MASK
> (GEN11_TBT4_HOTPLUG | \
>+#define GEN11_DE_TBT_HOTPLUG_MASK
> (GEN12_TBT6_HOTPLUG | \
>+ GEN12_TBT5_HOTPLUG | \
>+ GEN11_TBT4_HOTPLUG | \
> GEN11_TBT3_HOTPLUG | \
> GEN11_TBT2_HOTPLUG | \
> GEN11_TBT1_HOTPLUG)
>--
>2.21.0
>
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